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48GA004 Datasheet(PDF) 263 Page - Microchip Technology |
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48GA004 Datasheet(HTML) 263 Page - Microchip Technology |
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263 / 268 page ![]() 2010 Microchip Technology Inc. DS39881D-page 263 PIC24FJ64GA004 FAMILY PORTA........................................................................ 40 PORTB........................................................................ 40 PORTC ....................................................................... 40 Real-Time Clock and Calendar (RTCC) ..................... 42 SPI .............................................................................. 39 Timers ......................................................................... 37 UART .......................................................................... 39 Registers AD1CHS (A/D Input Select) ...................................... 196 AD1CON1 (A/D Control 1) ........................................ 193 AD1CON2 (A/D Control 2) ........................................ 194 AD1CON3 (A/D Control 3) ........................................ 195 AD1CSSL (A/D Input Scan Select) ........................... 197 AD1PCFG (A/D Port Configuration).......................... 197 ALCFGRPT (Alarm Configuration)............................ 181 ALMINSEC (Alarm Minutes and Seconds Value) ................................................ 185 ALMTHDY (Alarm Month and Day Value) ................ 184 ALWDHR (Alarm Weekday and Hours Value).......... 184 CLKDIV (Clock Divider) .............................................. 99 CMCON (Comparator Control) ................................. 202 CORCON (Core Control) ............................................ 65 CORCON (CPU Control) ............................................ 29 CRCCON (CRC Control) .......................................... 189 CRCXOR (CRC XOR Polynomial)............................ 190 CVRCON (Comparator Voltage Reference Control) ........................................... 206 CW1 (Flash Configuration Word 1)........................... 208 CW2 (Flash Configuration Word 2)........................... 210 DEVID (Device ID) .................................................... 211 DEVREV (Device Revision) ...................................... 211 I2CxCON (I2Cx Control) ........................................... 154 I2CxMSK (I2Cx Slave Mode Address Mask) ............ 158 I2CxSTAT (I2Cx Status) ........................................... 156 ICxCON (Input Capture x Control) ............................ 134 IECn (Interrupt Enable Control 0-4) ...................... 73–77 IFSn (Interrupt Flag Status 0-4) ............................ 68–72 INTCON1 (Interrupt Control 1).................................... 66 INTCON2 (Interrupt Control 2).................................... 67 IPCn (Interrupt Priority Control 0-18) .................... 78–92 MINSEC (RTCC Minutes and Seconds Value)......... 183 MTHDY (RTCC Month and Day Value) .................... 182 NVMCON (Flash Memory Control) ............................. 51 OCxCON (Output Compare x Control) ..................... 139 OSCCON (Oscillator Control) ..................................... 97 OSCTUN (FRC Oscillator Tune)............................... 100 PADCFG1 (Pad Configuration Control) ............ 173, 180 PMADDR (PMP Address) ......................................... 171 PMAEN (PMP Enable).............................................. 171 PMCON (PMP Control)............................................. 168 PMMODE (PMP Mode)............................................. 170 PMPSTAT (PMP Status)........................................... 172 RCFGCAL (RTCC Calibration and Configuration) ............................................ 179 RCON (Reset Control) ................................................ 56 RPINRn (PPS Input Mapping 0-23) .................. 111–117 RPORn (PPS Output Mapping 0-12) ................ 118–124 SPIxCON1 (SPIx Control 1)...................................... 146 SPIxCON2 (SPIx Control 2)...................................... 147 SPIxSTAT (SPIx Status and Control) ....................... 144 SR (ALU STATUS) ............................................... 28, 65 T1CON (Timer1 Control)........................................... 126 TxCON (Timer2 and Timer4 Control)........................ 130 TyCON (Timer3 amd Timer5 Control)....................... 131 UxMODE (UARTx Mode).......................................... 162 UxRXREG (UARTx Receive) ................................... 166 UxSTA (UARTx Status and Control) ........................ 164 UxTXREG (UARTx Transmit)................................... 166 WKDYHR (RTCC Weekday and Hours Value) ........ 183 YEAR (RTCC Year Value)........................................ 182 Resets Clock Source Selection .............................................. 57 Delay Times................................................................ 58 RCON Flags Operation .............................................. 57 SFR States ................................................................. 59 Revision History................................................................ 259 RTCC Alarm Configuration.................................................. 186 Calibration ................................................................ 185 Register Mapping ..................................................... 178 S Serial Peripheral Interface. See SPI. ................................ 141 SFR Space ......................................................................... 34 Slective Peripheral Power Control .................................... 104 Sleep Mode ...................................................................... 103 Software Simulator (MPLAB SIM) .................................... 218 Software Stack ................................................................... 45 T Timer1 .............................................................................. 125 Timer2/3 and Timer4/5 ..................................................... 127 Timing Diagrams CLKO and I/O Timing ............................................... 243 External Clock Timing............................................... 241 U UART Baud Rate Generator (BRG) .................................... 160 Break and Sync Sequence ....................................... 161 IrDA Support............................................................. 161 Operation of UxCTS and UxRTS Control Pins ......... 161 Receiving.................................................................. 161 Transmitting.............................................................. 161 V VDDCORE/VCAP pin............................................................ 212 Voltage Regulator (On-Chip) ............................................ 212 and BOR................................................................... 213 and POR................................................................... 212 Standby Mode .......................................................... 213 Tracking Mode.......................................................... 212 W Watchdog Timer (WDT).................................................... 213 Winowed Operation .................................................. 214 WWW Address ................................................................. 265 WWW, On-Line Support ....................................................... 8 |
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