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18F8680 Datasheet(PDF) 287 Page - Microchip Technology |
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18F8680 Datasheet(HTML) 287 Page - Microchip Technology |
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287 / 496 page ![]() 2004 Microchip Technology Inc. DS30491C-page 285 PIC18F6585/8585/6680/8680 23.2.2 DEDICATED CAN TRANSMIT BUFFER REGISTERS This section describes the dedicated CAN Transmit Buffer registers and their associated control registers. REGISTER 23-5: TXBnCON: TRANSMIT BUFFER n CONTROL REGISTERS [0 ≤ n ≤ 2] Mode 0 U-0 R-0 R-0 R-0 R/W-0 U-0 R/W-0 R/W-0 — TXABT TXLARB TXERR TXREQ — TXPRI1 TXPRI0 Mode 1, 2 R/C-0 R-0 R-0 R-0 R/W-0 U-0 R/W-0 R/W-0 TXBIF TXABT TXLARB TXERR TXREQ — TXPRI1 TXPRI0 bit 7 bit 0 bit 7 Mode 0: Unimplemented: Read as ‘0’ Mode 1, 2: TXBIF: Transmit Buffer Interrupt Flag bit 1 = Transmit buffer has completed transmission of message and may be reloaded 0 = Transmit buffer has not completed transmission of a message bit 6 TXABT: Transmission Aborted Status bit(1) 1 = Message was aborted 0 = Message was not aborted bit 5 TXLARB: Transmission Lost Arbitration Status bit(1) 1 = Message lost arbitration while being sent 0 = Message did not lose arbitration while being sent bit 4 TXERR: Transmission Error Detected Status bit(1) 1 = A bus error occurred while the message was being sent 0 = A bus error did not occur while the message was being sent bit 3 TXREQ: Transmit Request Status bit(2) 1 = Requests sending a message. Clears the TXABT, TXLARB, and TXERR bits. 0 = Automatically cleared when the message is successfully sent Note: Clearing this bit in software while the bit is set, will request a message abort. bit 2 Unimplemented: Read as ‘0’ bit 1-0 TXPRI1:TXPRI0: Transmit Priority bits(3) 11 = Priority Level 3 (highest priority) 10 = Priority Level 2 01 = Priority Level 1 00 = Priority Level 0 (lowest priority) Note 1: This bit is automatically cleared when TXREQ is set. 2: While TXREQ is set, Transmit Buffer registers remain read-only. 3: These bits define the order in which transmit buffers will be transferred. They do not alter the CAN message identifier. Legend: U = Unimplemented bit, read as ‘0’ - n = Value at POR C = Clearable bit R = Readable bit W = Writable bit x = Bit is unknown ‘1’ = Bit is set ‘0’ = Bit is cleared |
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