PIC16F84A datasheet(327/337 Pages) MICROCHIP

327 / 337 page

DS30234D-page 327

PIC16C6X

Figure 11-2:

SSPCON: Sync Serial Port

Control Register (Address 14h) .................. 85

Figure 11-3:

SSP Block Diagram (SPI Mode) ................. 86

Figure 11-4:

SPI Master/Slave Connection..................... 87

Figure 11-5:

SPI Mode Timing, Master Mode or

Slave Mode w/o SS Control........................ 88

Figure 11-6:

SPI Mode Timing, Slave Mode with

SS Control .................................................. 88

Figure 11-7:

SSPSTAT: Sync Serial Port Status

Figure 11-8:

SSPCON: Sync Serial Port Control

Figure 11-9:

SSP Block Diagram (SPI Mode)

(PIC16C66/67)............................................ 91

Figure 11-10: SPI Master/Slave Connection

(PIC16C66/67)............................................ 92

Figure 11-11: SPI Mode Timing, Master Mode

(PIC16C66/67)............................................ 93

Figure 11-12: SPI Mode Timing (Slave Mode With

CKE = 0) (PIC16C66/67) ............................ 93

Figure 11-13: SPI Mode Timing (Slave Mode With

CKE = 1) (PIC16C66/67) ............................ 94

Figure 11-14: Start and Stop Conditions........................... 95

Figure 11-15: 7-bit Address Format .................................. 96

Figure 11-16: I2C 10-bit Address Format .......................... 96

Figure 11-17: Slave-receiver Acknowledge ...................... 96

Figure 11-18: Data Transfer Wait State ............................ 96

Figure 11-19: Master-transmitter Sequence ..................... 97

Figure 11-20: Master-receiver Sequence.......................... 97

Figure 11-21: Combined Format ....................................... 97

Figure 11-22: Multi-master Arbitration

(Two Masters)............................................. 98

Figure 11-23: Clock Synchronization ................................ 98

Figure 11-24: SSP Block Diagram (I2C Mode).................. 99

Figure 11-25:

I2C Waveforms for Reception

(7-bit Address) .......................................... 101

Figure 11-26: I2C Waveforms for Transmission

(7-bit Address) .......................................... 102

Figure 11-27: Operation of the I2C Module in

IDLE_MODE, RCV_MODE or

XMIT_MODE ............................................ 104

Figure 12-1:

TXSTA: Transmit Status and

Control Register (Address 98h) ................ 105

Figure 12-2:

RCSTA: Receive Status and

Control Register (Address 18h) ................ 106

Figure 12-3:

RX Pin Sampling Scheme (BRGH = 0)

PIC16C63/R63/65/65A/R65) .................... 110

Figure 12-4:

RX Pin Sampling Scheme (BRGH = 1)

(PIC16C63/R63/65/65A/R65) ................... 110

Figure 12-5:

RX Pin Sampling Scheme (BRGH = 1)

(PIC16C63/R63/65/65A/R65) ................... 110

Figure 12-6:

RX Pin Sampling Scheme (BRGH = 0 or = 1)

(PIC16C66/67).......................................... 111

Figure 12-7:

USART Transmit Block Diagram .............. 112

Figure 12-8:

Asynchronous Master Transmission......... 113

Figure 12-9:

Asynchronous Master Transmission

(Back to Back) .......................................... 113

Figure 12-10: USART Receive Block Diagram ............... 114

Figure 12-11: Asynchronous Reception.......................... 114

Figure 12-12: Synchronous Transmission ...................... 117

Figure 12-13: Synchronous Transmission

through TXEN ........................................... 117

Figure 12-14: Synchronous Reception

(Master Mode, SREN) .............................. 119

Figure 13-1:

Configuration Word for PIC16C61 ............ 123

Figure 13-2:

Configuration Word for

PIC16C62/64/65........................................124

Figure 13-3:

Configuration Word for

PIC16C62A/R62/63/R63/64A/R64/

65A/R65/66/67 ..........................................124

Figure 13-4:

Crystal/Ceramic Resonator Operation

(HS, XT or LP OSC Configuration)............125

Figure 13-5:

External Clock Input Operation

(HS, XT or LP OSC Configuration)............125

Figure 13-6:

External Parallel Resonant

Crystal Oscillator Circuit ............................127

Figure 13-7:

External Series Resonant

Crystal Oscillator Circuit ............................127

Figure 13-8:

RC Oscillator Mode ...................................127

Figure 13-9:

Simplified Block Diagram of

On-chip Reset Circuit ................................128

Figure 13-10: Brown-out Situations .................................129

Figure 13-11: Time-out Sequence on Power-up

(MCLR not Tied to VDD): Case 1...............134

Figure 13-12: Time-out Sequence on Power-up

(MCLR Not Tied To VDD): Case 2 .............134

Figure 13-13: Time-out Sequence on Power-up

(MCLR Tied to VDD) ..................................134

Figure 13-14: External Power-on Reset Circuit

(For Slow VDD Power-up)..........................135

Figure 13-15: External Brown-out

Protection Circuit 1 ....................................135

Figure 13-16: External Brown-out

Protection Circuit 2 ....................................135

Figure 13-17: Interrupt Logic for PIC16C61.....................137

Figure 13-18: Interrupt Logic for PIC16C6X ....................137

Figure 13-19: INT Pin Interrupt Timing ............................138

Figure 13-20: Watchdog Timer Block Diagram................140

Figure 13-21: Summary of Watchdog

Timer Registers .........................................140

Figure 13-22: Wake-up from Sleep

Through Interrupt.......................................142

Figure 13-23: Typical In-circuit Serial

Programming Connection..........................142

Figure 14-1:

General Format for Instructions.................143

Figure 16-1:

Load Conditions for Device Timing

Specifications ............................................168

Figure 16-2:

External Clock Timing ...............................169

Figure 16-3:

CLKOUT and I/O Timing ...........................170

Figure 16-4:

Reset, Watchdog Timer, Oscillator

Start-up Timer and Power-up Timer

Timing........................................................171

Figure 16-5:

Timer0 External Clock Timings .................172

Figure 17-1:

Typical RC Oscillator

Frequency vs. Temperature .....................173

Figure 17-2:

Typical RC Oscillator

Frequency vs. VDD ....................................174

Figure 17-3:

Typical RC Oscillator

Frequency vs. VDD ....................................174

Figure 17-4:

Typical RC Oscillator

Frequency vs. VDD ....................................174

Figure 17-5:

Typical IPD vs. VDD Watchdog Timer

Disabled 25

°C ...........................................174

Figure 17-6:

Typical IPD vs. VDD Watchdog Timer

Enabled 25

°C ............................................175

Figure 17-7:

Maximum IPD vs. VDD Watchdog

Disabled ....................................................175

Figure 17-8:

Maximum IPD vs. VDD Watchdog

Enabled*....................................................176

Figure 17-9:

VTH (Input Threshold Voltage) of

I/O Pins vs. VDD ........................................176

PIC16F84A Datasheet(PDF) 327 Page - Microchip Technology

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