7

All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.

Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-

out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see web site http://www.intersil.com

FIGURE 13. OUTPUT CURRENT vs AMBIENT TEMPERATURE

-75

-50

-25

0

25

50

75

100

125

0

10

20

30

40

50

60

70

V+ = 15V

Metallization Mask Layout

72

70

60

50

40

30

20

10

0

66

60

50

40

30

20

10

0

69 - 77

(1.753 - 1.956)

63 - 71

(1.600 - 1.803)

4 - 10

(0.102 - 0.254)

Dimensions in parentheses are in millimeters and derived

from the basic inch dimensions as indicated. Grid gradua-

The photographs and dimensions represent a chip when it

is part of the wafer. When the wafer is cut into chips, the

face of the chip. Therefore, the isolated chip is actually 7mils

(0.17mm) larger in both dimensions.

CA158, CA158A, CA258, CA258A, CA358, CA358A, CA2904, LM358, LM2904