ATmega16 datasheet(257/315 Pages) ATMEL

257 / 315 page

257

ATmega16(L)

2466E–AVR–10/02

Parallel Programming

Parameters, Pin

Mapping, and

Commands

This section describes how to parallel program and verify Flash Program memory,

EEPROM Data memory, Memory Lock bits, and Fuse bits in the ATmega16. Pulses are

assumed to be at least 250 ns unless otherwise noted.

Signal Names

In this section, some pins of the ATmega16 are referenced by signal names describing

their functionality during parallel programming, see Figure 127 and Table 106. Pins not

described in the following table are referenced by pin names.

The XA1/XA0 pins determine the action executed when the XTAL1 pin is given a posi-

tive pulse. The bit coding is shown in Table 108.

When pulsing WR or OE, the command loaded determines the action executed. The dif-

ferent Commands are shown in Table 109.

Figure 127. Parallel Programming

Table 106. Pin Name Mapping

Signal Name in

Programming Mode

Pin Name

I/O

Function

RDY/BSY

PD1

0: Device is busy programming, 1: Device is ready

for new command

PD2

Output Enable (Active low)

PD3

Write Pulse (Active low)

BS1

PD4

Byte Select 1 (“0” selects low byte, “1” selects high

byte)

XA0

PD5

XTAL Action Bit 0

XA1

PD6

XTAL Action Bit 1

VCC

+5V

GND

XTAL1

PD1

PD2

PD3

PD4

PD5

PD6

PB7 - PB0

DATA

RESET

PD7

+12 V

BS1

XA0

XA1

RDY/BSY

PAGEL

PA0

BS2

AVCC

+5V

ATMEGA16 Datasheet(PDF) 257 Page - ATMEL Corporation

ATMEGA16 Datasheet(HTML) 257 Page - ATMEL Corporation

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL