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LAN9730 Datasheet(PDF) 120 Page - Microchip Technology |
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LAN9730 Datasheet(HTML) 120 Page - Microchip Technology |
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120 / 222 page  LAN9730/LAN9730i DS00001946A-page 120 2012-2015 Microchip Technology Inc. 6.3 System Control and Status Registers TABLE 6-3: DEVICE CONTROL AND STATUS REGISTER MAP Address Symbol Register Name 000h ID_REV Device ID and Revision Register 004h RESERVED Reserved for future expansion 008h INT_STS Interrupt Status Register 00Ch RX_CFG Receive Configuration Register 010h TX_CFG Transmit Configuration Register 014h HW_CFG Hardware Configuration Register 018h RX_FIFO_INF Receive FIFO Information Register 01Ch TX_FIFO_INF Transmit FIFO Information Register 020h PMT_CTL Power Management Control Register 024h LED_GPIO_CFG LED General Purpose IO Configuration Register 028h GPIO_CFG General Purpose IO Configuration Register 02Ch AFC_CFG Automatic Flow Control Configuration Register 030h E2P_CMD EEPROM Command Register 034h E2P_DATA EEPROM Data Register 038h BURST_CAP Burst Cap Register 03Ch RESERVED Reserved for future expansion 040h DP_SEL Data Port Select Register 044h DP_CMD Data Port Command Register 048h DP_ADDR Data Port Address Register 04Ch DP_DATA0 Data Port Data 0 Register 050h DP_DATA1 Data Port Data 1 Register 054h – 060h RESERVED Reserved for future expansion 064h GPIO_WAKE General Purpose IO Wake Enable and Polarity Register 068h INT_EP_CTL Interrupt Endpoint Control Register 06Ch BULK_IN_DLY Bulk-In Delay Register 070h DBG_RX_FIFO_LVL Receive FIFO Level Debug Register 074h DBG_RX_FIFO_PTR Receive FIFO Pointer Debug Register 078h DBG_TX_FIFO_LVL Transmit FIFO Level Debug Register 07Ch DBG_TX_FIFO_PTR Transmit FIFO Pointer Debug Register 080h – 09Fh RESERVED Reserved for future expansion 0A0h HS_ATTR HS Descriptor Attributes Register 0A4h FS_ATTR FS Descriptor Attributes Register 0A8h STRNG_ATTR0 String Descriptor Attributes Register 0 0ACh STRNG_ATTR1 String Descriptor Attributes Register 1 0B0h FLAG_ATTR Flag Attributes Register 0B4h – 0FFh RESERVED Reserved for future expansion |
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