LAN9730 datasheet(144/222 Pages) MICROCHIP

Part #	LAN9730

Description	High-Speed Inter-Chip USB 2.0 to 10/100 Ethernet Controller

PDF	222 Pages

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Manufacturer	MICROCHIP [Microchip Technology]

Direct Link	http://www.microchip.com

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144 / 222 page

LAN9730/LAN9730i

DS00001946A-page 144

 2012-2015 Microchip Technology Inc.

6.3.15

DATA PORT SELECT REGISTER (DP_SEL)

Before accessing the internal RAMs, the TESTEN bit must be set. It is not valid to use the RAM data port during run time.

The RAM Test Mode Select chooses which internal RAM to access.

The Data Port Ready bit indicates when the data port RAM access has been completed. In the case of a read operation,

this indicates when the read data has been stored in the DP_DATA register.

Address:

040h

Size:

32 bits

Bits

Description

Type

Default

Data Port Ready (DPRDY)

0 = Data port is processing a transaction.

1 = Data port is ready.

30:3

RESERVED

2:1

RAM Test Select (RSEL)

Selects which RAM to access.

00 = FCT Data RAM

01 = EEPROM storage RAM

10 = TX TLI RAM

11 = RX TLI RAM

R/W

RAM Test Mode Enable (TESTEN)

Put all test accessible RAMs in test mode.

R/W

LAN9730 Datasheet(PDF) 144 Page - Microchip Technology