TLE 4242 G

Data Sheet

5

Rev. 1.0, 2004-01-01

The functionality of the ST and PWM as well as their timings are shown in Figure 4. The

Status delay can be adjusted via the capacitor connected to the timing Pin D. The delay

time scales in linear way with the capacitance

C

(2)

Figure 4

Function and Timing Diagram

t

STHL,typ

C

D

47 nF

---------------

10 ms

×

=

t

STLH,typ

C

D

47 nF

---------------

10

µs

×

=

V

I

AET03505.VSD

t

V

ST

t

V

STL

t

V

PWM

V

PWM, H

t

V

PWM, L

I

Q

t

mA

256

t

PWM, OFF

t

PWM, ON

V

D

V

UD

V

LD

Open

Load

t

STHL