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PI3546-00-LGIZ Datasheet(PDF) 6 Page - Vicor Corporation |
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PI3546-00-LGIZ Datasheet(HTML) 6 Page - Vicor Corporation |
6 / 37 page ![]() Cool-Power® Rev 1.3 vicorpower.com Page 6 of 37 2/2016 800 927.9474 PI354x-00 Package Pin-Out Pin Description Block 1: VIN; K9-10, J9-10, H9-10, G9-10 Block 2: VS1; K1-7 Block 3: PGND; H1-7, G1-7,F1-7, E2-8, D2-8, C2-5 Block 4: SGND; D9, C6-9, B4-9, A7 85 Pad LGA Sip (10 mm x 10mm) (Top through view) Name Location I/O Description VS1 Block 2 (See Pkg Pin-Out dwg) I/O Switching node: and ZVS sense for power switches. VIN Block 1 I Input voltage: and sense for UVLO, OVLO and feed forward ramp. VDR 1E I/O Gate Driver VCC : Internally generated 5.1 V. May be used as reference or low power bias supply for up to 2 mA. Must be impedance limited by the user. SYNCI 1D I Synchronization input: Synchronize to the falling edge of external clock frequency. SYNCI is a high impedance digital input node and should always be connected to SGND when not in use. SYNCO 1C O Synchronization output: Outputs a high signal for ½ of the minimum period for synchronization of other regulators. TESTx 1B, 1A, 2B, 2A I/O Test Connections: Use only with factory guidance. Connect to SGND for proper operation. PWRGD 3A O Power Good: High impedance when regulator is operating and VOUT is in regulation. May also be used as “Parallel Good” – see applications section. EN 4A I Enable Input: Regulator enable control. Asserted high or left floating – regulator enabled; asserted low, regulator output disabled. TRK 5A I Soft-start and track input: An external capacitor may be connected between TRK pin and SGND to decrease the rate of rise during soft-start. LGH 6A I Lighting (LGH)/Constant Current (CC) Sense Input: Input with a 100 mV threshold. Used for lighting and constant current type applications.When not using the constant current mode (CC mode), the LGH pin should be connected to SGND. COMP 8A O Compensation Capacitor: Connect capacitor for control loop dominant pole. EAO 9A O Error amp output: External connection for additional compensation and current sharing. EAIN 10A I Error Amp Inverting Input: Connection for the feedback divider tap. VDIFF 10B O Independent Amplifier Output: If unused connect in unity gain with VSP connected to SGND. VSN 10C I Independent Amplifier Inverting Input VSP 10D I Independent Amplifier Non-Inverting Input VOUT 9E, 10E I/O Output voltage: and sense for power switches and feed-forward ramp. SGND Block 4 - Signal ground: Internal logic ground for EA, TRK, SYNCI, SYNCO communication returns. SGND and PGND are star connected within the regulator package. PGND Block 3 - Power ground: VIN and VOUT power returns. |
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