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ST92185B2 Datasheet(PDF) 116 Page - STMicroelectronics

Part # ST92185B2
Description  16K/24K/32K ROM HCMOS MCU WITH ON-SCREEN-DISPLAY
PDF  178 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST92185B2 Datasheet(HTML) 116 Page - STMicroelectronics

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ST92185B - ON SCREEN DISPLAY (OSD)
ON SCREEN DISPLAY (Cont’d)
7.4.6.6 Building a Serial Mode, 80 Char, Line
Mode Display
Half-Page Location:
The pair of 0.5 Kbyte blocks of half page content is
stored in the TDSRAM location pointed to by the
PG3..PG0 bits. The first block contains the left half
rows, the other block contains the right half rows.
Header/Status Rows Location:
The 0.5 Kbyte block containing the Header, Status
Row 0 and Status Row 1 is pointed to by the
HS3..HS0 bits.
The Row attribute (row count) is stored in this
block at offset 100h and contains 12 bytes for line
mode (see DCM1R register description).
Row Scrolling Buffer Location:
The scrolling buffer corresponds to Row 12 when
the scrolling feature is used (in this case 11 rows
are scrolled).
Figure 76. Serial (80 Characters) Line Mode Mapping
Figure 77. Serial (80 Characters) Line Mode - Header and Status Mapping
0.5K TDSRAM
Resolution 1K bytes
Block
Number(1K)
TDSRAM
Address Left
(hex)
TDSRAM
Address Right
(hex)
TDPR
Value (hex)
PG3..PG0
0
8000
8200
0
1
8400
8600
2
28800
8A00
4
3
8C00
8E00
6
4
9000
9200
8
5
9400
9600
A
69800
9A00
C
7
9C00
9E00
E
Row 1 Left
Row 11
Free Space
Row 12/Scroll Buffer
0.5K TDSRAM
Row 1 Right
Row 11
Free Space
Row 12/Scroll Buffer
6K
2K
8K
See Figure 22 for Address Values
0.5K TDSRAM
Header
Resolution 0.5K bytes
Status Row 0
Status Row 1
Free Space
Free Space
Row Attr.
100h



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