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ST92185B2 Datasheet(PDF) 133 Page - STMicroelectronics |
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ST92185B2 Datasheet(HTML) 133 Page - STMicroelectronics |
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133 / 178 page ![]() 133/178 ST92185B - ON SCREEN DISPLAY (OSD) 7.4.10 Application Software Examples Before starting an OSD Display, it is very important to start all the internal clock/timings To understand the software routines given below, make a thorough study of the chapters on the Reset and Clock Control Unit (RCCU) and the TDSRAM Interface. Initialization of the Internal Clock ;========================================================================= ; MAIN CLOCK INIT ;========================================================================= CLOCKS:: ;--------- CPU MAIN CLOCK ------------ ; C K M A I N provided by the freq. multplier spp #TCCR_PG; Timings & clock Controller registers page ; page 39 or 27 ld MCCR,#0x05; program the frequency multiplier down ; counter in the feed-back loop (253 =FD) ; freq=(5+1)*2 =12Mhz ; freq=(7+1)*2 =16Mhz ; freq=(8+1)*2 =18Mhz ld MCCR,#0x85; enable the freq. multiplier srp #BK20 ldw rr0,#0x2FFF; time_stab1: ; for frequency multiplier stabilization decw rr0; change CPU source clock & wait clock stabilization cpw rr0,#0x00; jxnz time_stab1; ld MCCR,#0xC5 ; select the freq. multiplier as main clock pop ppr ;========================================================================= ; SYNCHRO START ;========================================================================= spp #SYCR_PG ; set page pointer to page 23h or 35 decimal ld CSYCTR,#000h; R243, Hsync and Vsync from deflection part (external) ld CSYSUR,#0C4h; R242 Sync Controller Set-up register ; Standard mode, Positive polarity of Hsync & Vsync ; delay on Hsync/Vsync HSF(3:0)=9 ;========================================================================= ; DISPLAY PIXEL CLOCK ;========================================================================= ; spp #TCCR_PG; Timings & clock Controller registers page ; set page pointer to page 39 decimal ld SKCCR, #0x09; FE, Skew clock control register ; program the frequency multiplier down ; counter in the feed-back loop |
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