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BD1754HFN

Datasheet

TSZ02201-0G3G0C200060-1-2

10.Dec.2015 Rev.002

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© 2012 ROHM Co., Ltd. All rights reserved.

TSZ22111･15･001

Operational Notes

– continued

11.

Unused Input Pins

Input pins of an IC are often connected to the gate of a MOS transistor. The gate has extremely high impedance and

extremely low capacitance. If left unconnected, the electric field from the outside can easily charge it. The small

charge acquired in this way is enough to produce a significant effect on the conduction through the transistor and

cause unexpected operation of the IC. So unless otherwise specified, unused input pins should be connected to the

power supply or ground line.

12.

Regarding the Input Pin of the IC

This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them

isolated. P-N junctions are formed at the intersection of the P layers with the N layers of other elements, creating a

parasitic diode or transistor. For example (refer to figure below):

When GND > Pin A and GND > Pin B, the P-N junction operates as a parasitic diode.

When GND > Pin B, the P-N junction operates as a parasitic transistor.

Parasitic diodes inevitably occur in the structure of the IC. The operation of parasitic diodes can result in mutual

interference among circuits, operational faults, or physical damage. Therefore, conditions that cause these diodes to

operate, such as applying a voltage lower than the GND voltage to an input pin (and thus to the P substrate) should

be avoided.

Figure 22. Example of monolithic IC structure

N

N

P

+

P

N

N

P

+

P Substrate

GND

N

P

+

N

N

P

+

N P

P Substrate

GND

GND

Parasitic

Elements

Pin A

Pin A

Pin B

Pin B

B

C

E

Parasitic

Elements

GND

Parasitic

Elements

C

B

E

Transistor (NPN)

Resistor

N Region

close-by

Parasitic

Elements