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STM32L476RG Datasheet(PDF) 231 Page - STMicroelectronics |
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STM32L476RG Datasheet(HTML) 231 Page - STMicroelectronics |
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231 / 232 page ![]() DocID025976 Rev 4 231/232 STM32L476xx Revision history 231 03-Dec-2015 4 In all the document: – Stop 1 with main regulator becomes Stop 0 – Stop 1 with low-power regulator remains as Stop 1. In Section 4: Pinouts and pin description: – PC14/OSC32_IN becomes PC14-OSC32_IN (PC14) – PC15/OSC32_OUT becomes PC15-OSC32_OUT (PC15) – PH0/OSC_IN becomes PH0-OSC_IN (PH0) – PH1/OSC_OUT becomes PH1-OSC_OUT (PH1) – PA13 becomes PA13 (JTMS-SWDIO) – PA14 becomes PA14 (JTCK-SWCLK) – PA15 becomes PA15 (JTDI) – PB3 becomes PB3 (JTDO-TRACESWO) – PB4 becomes PB4 (NJTRST). Added Table 12: STM32L4x6 USART/UART/LPUART features. Added Note 5. Updated Table 25: Embedded internal voltage reference. Updated Table 34: Current consumption in Stop 2 mode. Updated Table 35: Current consumption in Stop 1 mode. Updated Table 36: Current consumption in Stop 0 mode. Updated Table 37: Current consumption in Standby mode. Updated Table 38: Current consumption in Shutdown mode. Updated Table 41: Low-power mode wakeup timings. Added Figure 15: VREFINT versus temperature. Updated Figure 20: HSI16 frequency versus temperature. Updated Table 58: I/O static characteristics. Updated Table 69: DAC characteristics. Updated Figure 52: UFBGA132 - 132-ball, 7 x 7 mm ultra thin fine pitch ball grid array package outline. Updated Table 105: UFBGA132 - 132-ball, 7 x 7 mm ultra thin fine pitch ball grid array package mechanical data. Table 115. Document revision history (continued) Date Revision Changes |
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