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ST7LITE49K2 Datasheet(PDF) 121 Page - STMicroelectronics |
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ST7LITE49K2 Datasheet(HTML) 121 Page - STMicroelectronics |
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121 / 245 page  ST7LITE49K2 On-chip peripherals 121/245 the user toggle the output pin and if the ICIE bit is set. This can be avoided if the input capture function i is disabled by reading the ICiHR (see note 1). 6 The TOF bit can be used with interrupt in order to measure event that go beyond the timer range (FFFFh). Figure 60. Input capture block diagram Figure 61. Input capture timing diagram 1. The active edge is the rising edge. 2. The time between an event on the ICAPi pin and the appearance of the corresponding flag is from 2 to 3 CPU clock cycles. This depends on the moment when the ICAP event happens relative to the timer clock. ICIE CC0 CC1 16-bit free running counter IEDG1 CR1 (control register 1) CR2 (control register 2) ICF2 ICF1 0 0 0 SR (status register) IEDG2 ICAP1 Edge detect circuit 2 16-bit IC2R register pin ICAP2 pin Edge detect circuit 1 IC1R register FF01 FF02 FF03 FF03 Timer clock Counter register ICAPi pin ICAPi flag ICAPi register |
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