S3C72G9 datasheet(44/96 Pages) SAMSUNG

Part #	S3C72G9

Description	SAM47 INSTRUCTION SET

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Manufacturer	SAMSUNG [Samsung semiconductor]

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/+)-,&'

BXOR

C,src.b

Operation:

Operand

Operation Summary

Bytes

Cycles

C,mema.b

Exclusive-OR carry with memory bit

2

C,memb.@L

2

C,@H+DA.b

2

Description:

The specified bit of the source is logically XORed with the carry bit value. The resultant bit is

written to the carry flag. The source value is unaffected.

Operand

Binary Code

Operation Notation

C,mema.b

1

0

1

C

← C XOR mema.b

C,memb.@L

1

0

1

C

← C XOR [memb.7-2 + L.3-2].

[L.1-0]

0

1

0

a5

a4

a3

a2

C,@H+DA.b

1

0

1

C

← C XOR [H + DA.3-0].b

0

b1

b0

a3

a2

a1

a0

Second Byte

Bit Addresses

mema.b

1

0

b1

b0

a3

a2

a1

a0 FB0H-FBFH

1

b1

b0

a3

a2

a1

a0 FF0H-FFFH

Examples:

1. The carry flag is logically XORed with the P1.0 value:

RCF

; C

← "0"

BXOR

C,P1.0

; If P1.0 = "1", then C

← "1"; if P1.0 = "0", then C ← "0"

2. The P1 address is FF1H and register L contains the value 1H (0001B). The address (memb.7-

2) is 111100B and (L.3-2) = 00B. The resulting address is 11110000B or FF0H, specifying P0.

The bit value for the BXOR instruction, (L.1-0) is 01B which specifies bit 1. Therefore, P1.@L

= P0.1:

LD

L,#0001B

BXOR

C,P0.@L

; P1.@L is specified as P0.1; C XOR P0.1

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