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S3C72G9 Datasheet(PDF) 52 Page - Samsung semiconductor |
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S3C72G9 Datasheet(HTML) 52 Page - Samsung semiconductor |
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52 / 96 page  ,4)' '!!-$ , DI Operation: Operand Operation Summary Bytes Cycles - Disable all interrupts 2 2 Description: Bit 3 of the interrupt priority register IPR, IME, is cleared to logic zero, disabling all interrupts. Interrupts can still set their respective interrupt status latches, but the CPU will not directly service them. Operand Binary Code Operation Notation - 1 1 1 1 1 1 1 0 IME ← 0 1 0 1 1 0 0 1 0 Example: If the IME bit (bit 3 of the IPR) is logic one (e.g., all instructions are enabled), the instruction DI sets the IME bit to logic zero, disabling all interrupts. |
Similar Part No. - S3C72G9 |
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Similar Description - S3C72G9 |
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