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S3C72G9 Datasheet(PDF) 54 Page - Samsung semiconductor |
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S3C72G9 Datasheet(HTML) 54 Page - Samsung semiconductor |
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54 / 96 page  )'$'! % IDLE Operation: Operand Operation Summary Bytes Cycles - Engage CPU idle mode 2 2 Description: IDLE causes the CPU clock to stop while the system clock continues oscillating by setting bit 2 of the power control register (PCON). After an IDLE instruction has been executed, peripheral hard- ware remains operative. In application programs, an IDLE instruction must be immediately followed by at least three NOP instructions. This ensures an adequate time interval for the clock to stabilize before the next instruction is executed. If three or more NOP instructions are not used after IDLE instruction, leakage current could be flown because of the floating state in the internal bus. Operand Binary Code Operation Notation - 1 1 1 1 1 1 1 1 PCON.2 ← 1 1 0 1 0 0 0 1 1 Example: The instruction sequence IDLE NOP NOP NOP sets bit 2 of the PCON register to logic one, stopping the CPU clock. The three NOP instructions provide the necessary timing delay for clock stabilization before the next instruction in the program sequence is executed. |
Similar Part No. - S3C72G9 |
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Similar Description - S3C72G9 |
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