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S3C72G9 Datasheet(PDF) 59 Page - Samsung semiconductor |
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S3C72G9 Datasheet(HTML) 59 Page - Samsung semiconductor |
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59 / 96 page  5-2$') &'0'!" %! 1 JR dst Operation: Operand Operation Summary Bytes Cycles #im Branch to relative immediate address 1 2 @WX Branch relative to contents of WX register 2 3 @EA Branch relative to contents of EA 2 3 Description: JR causes the relative address to be added to the program counter and passes control to the instruction whose address is now in the PC. The range of the relative address is current PC - 15 to current PC + 16. The destination address for this jump is specified to the assembler by a label, an actual address, or by immediate data using a plus sign (+) or a minus sign (-). For immediate addressing, the (+) range is from 2 to 16 and the (-) range is from -1 to -15. If a 0, 1, or any other number that is outside these ranges are used, the assembler interprets it as an error. For JR @WX and JR @EA branch relative instructions, the valid range for the relative address is 0H-0FFH. The destination address for these jumps can be specified to the assembler by a label that lies anywhere within the current 256-byte block. Normally, the 'JR @WX' and 'JR @EA' instructions jump to the address in the page in which the instruction is located. However, if the first byte of the instruction code is located at address xxFEH or xxFFH, the instruction will jump to the next page. Operand Binary Code Operation Notation #im PC14-0 ← ADR (PC-15 to PC+16) @WX 1 1 0 1 1 1 0 1 PC14-0 ← PC14-8 + (WX) 0 1 1 0 0 1 0 0 @EA 1 1 0 1 1 1 0 1 PC14-0 ← PC14-8 + (EA) 0 1 1 0 0 0 0 0 First Byte Condition JR #im 0 0 0 1 a3 a2 a1 a0 PC ← PC+2 to PC+16 0 0 0 0 a3 a2 a1 a0 PC ← PC-1 to PC-15 |
Similar Part No. - S3C72G9 |
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Similar Description - S3C72G9 |
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