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S3C72G9 Datasheet(PDF) 7 Page - Samsung semiconductor |
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S3C72G9 Datasheet(HTML) 7 Page - Samsung semiconductor |
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7 / 96 page  Table 5-7. Opcode Definitions (Direct) Register r2 r1 r0 A 0 0 0 E 0 0 1 L 0 1 0 H 0 1 1 X 1 0 0 W 1 0 1 Z 1 1 0 Y 1 1 1 EA 0 0 0 HL 0 1 0 WX 1 0 0 YZ 1 1 0 12 Table 5-8. Opcode Definitions (Indirect) Register i2 i1 i0 @HL 1 0 1 @WX 1 1 0 @WL 1 1 1 12 A machine cycle is defined as one cycle of the selected CPU clock. Three different clock rates can be selected using the PCON register. In this document, the letter 'S' is used in tables when describing the number of additional machine cycles required for an instruction to execute, given that the instruction has a skip function ('S' = skip). The addition number of machine cycles that will be required to perform the skip usually depends on the size of the instruction being skipped — whether it is a 1-byte, 2-byte, or 3-byte instruction. A skip is also executed for SMB and SRB instructions. The values in additional machine cycles for 'S' for the three cases in which skip conditions occur are as follows: Case 1: No skip S = 0 cycles Case 2: Skip is 1-byte or 2-byte instruction S = 1 cycle Case 3: Skip is 3-byte instruction S = 2 cycles , 34 ) |
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