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S3C72G9 Datasheet(PDF) 70 Page - Samsung semiconductor |
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S3C72G9 Datasheet(HTML) 70 Page - Samsung semiconductor |
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70 / 96 page  % '2%!"'+!'2' LDD dst Operation: Operand Operation Summary Bytes Cycles A,@HL Load indirect data memory contents to A; decrement register L contents and skip on borrow 1 2 + S Description: The contents of a data memory location are loaded into the accumulator, and the contents of the register L are decreased by one. If a "borrow" occurs (e.g., if the resulting value in register L is 0FH), the next instruction is skipped. The contents of data memory and the carry flag value are not affected. Operand Binary Code Operation Notation A,@HL 1 0 0 0 1 0 1 1 A ← (HL), then L ← L-1; skip if L = 0FH Example: In this example, assume that register pair HL contains 20H and internal RAM location 20H contains the value 0FH: LD HL,#20H LDD A,@HL ; A ← (HL) and L ← L-1 JPS XXX ; Skip JPS YYY ; H ← 2H and L ← 0FH The instruction 'JPS XXX' is skipped since a "borrow" occurred after the 'LDD A,@HL' and instruction 'JPS YYY' is executed. |
Similar Part No. - S3C72G9 |
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Similar Description - S3C72G9 |
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