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S3C72G9 Datasheet(PDF) 94 Page - Samsung semiconductor |
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S3C72G9 Datasheet(HTML) 94 Page - Samsung semiconductor |
94 / 96 page ![]() /+ *''+!'2' XCHD dst,src Operation: Operand Operation Summary Bytes Cycles A,@HL Exchange A and data memory contents; decrement contents of register L and skip on borrow 1 2 + S Description: The instruction XCHD exchanges the contents of the accumulator with the RAM location addressed by register pair HL and then decrements the contents of register L. If the content of register L is 0FH, the next instruction is skipped. The value of the carry flag is unaffected. Operand Binary Code Operation Notation A,@HL 0 1 1 1 1 0 1 1 A ↔ (HL), then L ← L-1; skip if L = 0FH Example: Register pair HL contains the address 20H and internal RAM location 20H contains the value 0FH: LD HL,#20H LD A,#0H XCHD A,@HL ; A ← 0FH and L ← L - 1, (HL) ← "0" JPS XXX ; Skipped since a borrow occurred JPS YYY ; H ← 2H, L ← 0FH YYY XCHD A,@HL ; (2FH) ← 0FH, A ← (2FH), L ← L - 1 = 0EH The 'JPS YYY' instruction is executed since a skip occurs after the XCHD instruction. |
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Similar Description - S3C72G9 |
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