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S3C72G9 Datasheet(PDF) 30 Page - Samsung semiconductor |
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S3C72G9 Datasheet(HTML) 30 Page - Samsung semiconductor |
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30 / 96 page  %* +) BAND C,src.b Operation: Operand Operation Summary Bytes Cycles C,mema.b Logical-AND carry flag with memory bit 2 2 C,memb.@L 2 2 C,@H+DA.b 2 2 Description: The specified bit of the source is logically ANDed with the carry flag bit value. If the Boolean value of the source bit is a logic zero, the carry flag is cleared to "0"; otherwise, the current carry flag setting is left unaltered. The bit value of the source operand is not affected. Operand Binary Code Operation Notation C,mema.b 1 1 1 1 0 1 0 1 C ← C AND mema.b C,memb.@L 1 1 1 1 0 1 0 1 C ← C AND [memb.7-2 + L.3-2]. [L.1-0] 0 1 0 0 a5 a4 a3 a2 C,@H+DA.b 1 1 1 1 0 1 0 1 C ← C AND [H + DA.3-0].b 0 0 b1 b0 a3 a2 a1 a0 Second Byte Bit Addresses mema.b 1 0 b1 b0 a3 a2 a1 a0 FB0H-FBFH 1 1 b1 b0 a3 a2 a1 a0 FF0H-FFFH Examples: 1. The following instructions set the carry flag if P1.0 (port 1.0) is equal to "1" (and assuming the carry flag is already set to "1"): SMB 15 ; C ← "1" BAND C,P1.0 ; If P1.0 = "1", C ← "1" ; If P1.0 = "0", C ← "0" 2. Assume the P1 address is FF1H and the value for register L is 5H (0101B). The address (memb.7-2) is 111100B; (L.3-2) is 01B. The resulting address is 11110001B or FF1H, specifying P1. The bit value for the BAND instruction, (L.1-0) is 01B which specifies bit 1. Therefore, P1.@L = P1.1: LD L,#5H BAND C,P1.@L ; P1.@L is specified as P1.1 ; C AND P1.1 |
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