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S3C72G9 Datasheet(PDF) 36 Page - Samsung semiconductor

Part # S3C72G9
Description  SAM47 INSTRUCTION SET
Download  96 Pages
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Manufacturer  SAMSUNG [Samsung semiconductor]
Direct Link  http://www.samsung.com/Products/Semiconductor
Logo SAMSUNG - Samsung semiconductor

S3C72G9 Datasheet(HTML) 36 Page - Samsung semiconductor

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%*+)
BOR
C,src.b
Operation:
Operand
Operation Summary
Bytes
Cycles
C,mema.b
Logical-OR carry with specified memory bit
2
2
C,memb.@L
2
2
C,@H+DA.b
2
2
Description:
The specified bit of the source is logically ORed with the carry flag bit value. The value of the
source is unaffected.
Operand
Binary Code
Operation Notation
C,mema.b

1
1
1
1
0
1
1
0
C
← C OR mema.b
C,memb.@L
1
1
1
1
0
1
1
0
C
← C OR [memb.7-2 + L.3-2].
[L.1-0]
0
1
0
0
a5
a4
a3
a2
C,@H+DA.b
1
1
1
1
0
1
1
0
C
← C OR [H + DA.3-0].b
0
0
b1
b0
a3
a2
a1
a0
Second Byte
Bit Addresses
 mema.b
1
0
b1
b0
a3
a2
a1
a0 FB0H-FBFH
1
1
b1
b0
a3
a2
a1
a0 FF0H-FFFH
Examples:
1. The carry flag is logically ORed with the P1.0 value:
RCF
; C
← "0"
BOR
C,P1.0
; If P1.0 = "1", then C
← "1"; if P1.0 = "0", then C ← "0"
2. The P1 address is FF1H and register L contains the value 1H (0001B). The address (memb.7-
2) is 111100B and (L.3-2) = 00B. The resulting address is 11110000B or FF0H, specifying P0.
The bit value for the BOR instruction, (L.1-0) is 01B which specifies bit 1. Therefore, P1.@L =
P0.1:
LD
L,#1H
BOR
C,P1.@L
; P1.@L is specified as P0.1; C OR P0.1



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