 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
MN101C115 Datasheet(PDF) 5 Page - Panasonic Semiconductor |
|
|
|||||||||||||||||||||||||||||
MN101C115 Datasheet(HTML) 5 Page - Panasonic Semiconductor |
|
|
5 / 170 page  How to Read This Manual–2 s Manual Configuration Each section of this manual consists of a title, summary, main text, supplemental information, precautions and warnings. The layout and definition of each section are shown below. Subtitle Sub-subtitle The smallest block in this manual. Main text Summary Introduction to the section. Key information Important information from the text. Supplementary information Supplementary information for the main text. An explanation of terminology is also included. Precautions and warnings Precautions are listed in case of lost functionality or damage. Be sure to read. Chapter 4 Timer Functions 83 4-3 16-bit Timer Operation (timer 4) 4-3-1 Overview Timer 4 is a 16-bit programmable counter that can be used as an event counter. A signal with frequency of 1/2 of the timer 4 overflow signal can be output from the TM4IO pin. An input capture function and added pulse PWM output function can also be used. s Timer Operation Settings for timer operation are listed below. (1) Set the TM4EN flag of the timer 4 mode register (TM4MD) to "0" so that the count operation of timer 4 is stopped. (2) Set the TM4CK2~0 flags of the TM4MD register to select fosc, fs/4, or fs/16 as the clock source. (3) Set the TM4PWM flag of the TM4MD register to "0" so that 16-bit timer operation is selected. Figure 4-3-1 Binary Counter 4 (TM4BC) Count Timing 16 bit Timer Operation (timer 4) When servicing an interrupt reset the timer 4 interrupt request flag before operat ng timer 4 During a count operation be careful if the value set n TM4OCH and TM4OCL is smaller than the value of binary counter 4 since the count up operation will continue until overflow occurs C ock TM EN Binary counter Wr te to registe s TM OCH, TM OCL 05 0 06 07 08 09 00 If the TM4EN flag of the TM4MD register is changed simultaneously with other bits, the switching operation may cause binary counter 4 to be incremented. If the value of TM4OCH and TM4OCL registers is overwritten while timer 4 has stopped counting, binary counter 4 will be reset to X'0000'. |
Similar Part No. - MN101C115 |
|
Similar Description - MN101C115 |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
