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MV1001SC Datasheet(PDF) 26 Page - Shindengen Electric Mfg.Co.Ltd |
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MV1001SC Datasheet(HTML) 26 Page - Shindengen Electric Mfg.Co.Ltd |
26 / 35 page ![]() MV1001SC 25 5.2 PWM dimming 5.2.1 PWM dimming in 100% and minimum dimming ratio regions PWM dimming can be performed by sending a PWM signal to the REF pin with VREF in the 100% dimming ratio as the high level and VREF in the minimum dimming ratio region as the low level. Frequency f and on-duty cycle Don of a PWM signal should be 1 kHz or less and 1% or more, respectively. Figure 22 Example of PWM dimming operation As shown in Figure 22, when a PWM signal with on-duty cycle of Don is applied to the REF pin, Io becomes an average current Io (ave) = Don x Io (max) + (1 – Don) x Io (min). In actual use, Io (min) is very small, and the equation may be rewritten to Io (ave) ≈ Don x Io (max). In PWM dimming, if the first switching-on timing in the H-level period is irregular, the practical Don will also become irregular and Io will become unstable. The effect is especially significant if Don is small. To avoid this problem, the first switching-on timing in the H-level period of every cycle aligns with each other by detecting a change of VREF from L level to H level and forcibly outputting an on-trigger. This function helps stabilize Io (ave), even if Don is small. Don 1-Don Io VREF Io(max) Io(ave)≒Don×Io(max) H:2.6V or more L:0.15V or less t t H L IL Io(min) CAT.No.1A0102-1E |
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