STLC2415 datasheet(8/22 Pages) STMICROELECTRONICS

8 / 22 page

STLC2415

8/22

(1) Should be strapped to vssio if not used

(2) Should be strapped to vddio if not used

(3) Must have a 10 kOhm pull-up.

tdo

E18

JTAG pin (should be left open)

O/t

CMOS, 3.3V TTL

compatible, 2mA

slew rate control

PCM interface

pcm_a

A11

PCM data

I/O

CMOS, 3.3V TTL

compatible, 2mA

tristate

slew rate control

pcm_b

C10

PCM data

I/O

pcm_sync

A12

PCM 8kHz sync

I/O

pcm_clk

C11

PCM clock

I/O

CMOS, 3.3V TTL

compatible, 2mA

tristate

slew rate control

schmitt trigger

Radio interface

brclk

L18

Transmit clock

(1)

CMOS, 3.3V TTL

compatible

schmitt trigger

brxd

M18

Receive data

bmiso

M16

RF serial interface input data

(1)

CMOS, 3.3V TTL

compatible

bnden

N16

RF serial interface control

CMOS, 3.3V TTL

compatible, 2mA

slew rate control

bmosi

L16

RF serial interface output data

bdclk

K16

RF serial interface clock

btxd

K18

Transmit data

bsen

N18

Synthesizer ON

bpaen

J16

Open PLL

brxen

H18

Receive ON

btxen

G18

Transmit ON

bpktctl

J18

Packet ON

ant_sw

H16

Antenna switch

CMOS, 3.3V TTL

compatible, 8mA

slew rate control

Table 9. Pin List (continued)

Name

Pin #

Description

DIR

PU/PD

VDD

PAD

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