AD7684

Rev. 0 | Page 13 of 16

AD7684

REF

GND

VDD

–IN

+IN

DCLOCK

CS

3-WIRE INTERFACE

100nF

2.7V TO 5.25V

2.2

µF TO 10µF

(NOTE 2)

REF

33

Ω

2.7nF

(NOTE 3)

(NOTE 4)

(NOTE 1)

33

Ω

2.7nF

(NOTE 3)

(NOTE 4)

NOTE 1: SEE REFERENCE SECTION FOR REFERENCE SELECTION.

NOTE 3: SEE DRIVER AMPLIFIER CHOICE SECTION.

NOTE 4: OPTIONAL FILTER. SEE ANALOG INPUT SECTION.

NOTE 5: SEE DIGITAL INTERFACE FOR MOST CONVENIENT INTERFACE MODE.

Figure 22. Typical Application Diagram

TYPICAL CONNECTION DIAGRAM

Figure 22 shows an example of the recommended application

diagram for the AD7684.

ANALOG INPUT

Figure 23 shows an equivalent circuit of the input structure of

the AD7684. The two diodes, D1 and D2, provide ESD protec-

tion for the analog inputs, +IN and −IN. Care must be taken to

ensure that the analog input signal never exceeds the supply

rails by more than 0.3 V, because this will cause these diodes to

become forward-biased and start conducting current. However,

these diodes can handle a forward-biased current of 130 mA

maximum. For instance, these conditions could eventually

occur when the input buffer’s (U1) supplies are different from

VDD. In such a case, an input buffer with a short-circuit current

limitation can be used to protect the part.

D1

D2

+IN

OR –IN

GND

VDD

Figure 23. Equivalent Analog Input Circuit

This analog input structure allows the sampling of the differ-

ential signal between +IN and −IN. By using this differential

input, small signals common to both inputs are rejected. For

instance, by using −IN to sense a remote signal ground, ground

potential differences between the sensor and the local ADC

ground are eliminated. During the acquisition phase, the impe-

dance of the analog input +IN can be modeled as a parallel

made up of some serial resistors and the on-resistance of the

capacitor. During the conversion phase, when the switches are

make a 1-pole, low-pass filter that reduces undesirable aliasing

effects and limits the noise.

When the source impedance of the driving circuit is low, the

AD7684 can be driven directly. Large source impedances signi-

ficantly affect the ac performance, especially THD. The dc

performances are less sensitive to the input impedance.

DRIVER AMPLIFIER CHOICE

Although the AD7684 is easy to drive, the driver amplifier

needs to meet the following requirements:

•

The noise generated by the driver amplifier needs to be

kept as low as possible in order to preserve the SNR and

transition noise performance of the AD7684. Note that the

AD7684 has a noise much lower than most other 16-bit

ADCs and, therefore, can be driven by a noisier op amp

while preserving the same or better system performance.

The noise coming from the driver is filtered by the AD7684

•

For ac applications, the driver needs to have a THD

performance suitable to that of the AD7684. Figure 15

shows the THD vs. frequency that the driver should

exceed.

•

For multichannel multiplexed applications, the driver

amplifier and the AD7684 analog input circuit must be able

to settle for a full-scale step of the capacitor array at a

16-bit level (0.0015%). In the amplifier’s data sheet, settling

at 0.1% to 0.01% is more commonly specified. This could

differ significantly from the settling time at a 16-bit level

and should be verified prior to driver selection.