AD8221ARM datasheet(14/20 Pages) AD

14 / 20 page

AD8221

Rev. A | Page 14 of 20

GAIN SELECTION

Placing a resistor across the RG terminals will set the AD8221’s

gain, which may be calculated by referring to Table 3 or by

using the gain equation

kΩ

−

Table 3. Gains Achieved Using 1% Resistors

1% Std Table Value of RG (Ω)

Calculated Gain

49.9 k

1.990

12.4 k

4.984

5.49 k

9.998

2.61 k

19.93

1.00 k

50.40

499

100.0

249

199.4

100

495.0

49.9

991.0

The AD8221 defaults to G = 1 when no gain resistor is used.

Gain accuracy is determined by the absolute tolerance of RG.

The TC of the external gain resistor will increase the gain drift

of the instrumentation amplifier. Gain error and gain drift are

kept to a minimum when the gain resistor is not used.

LAYOUT

Careful board layout maximizes system performance. Traces

from the gain setting resistor to the RG pins should be kept as

short as possible to minimize parasitic inductance. To ensure

the most accurate output, the trace from the REF pin should

either be connected to the AD8221’s local ground as shown in

Figure 47, or connected to a voltage that is referenced to the

AD8221’s local ground.

Common-Mode Rejection

One benefit of the AD8221’s high CMRR over frequency is that

it has greater immunity to disturbances such as line noise and

its associated harmonics than do typical in-amps. These,

typically, have CMRR fall-off at 200 Hz; common-mode filters

are often used to compensate for this shortcoming. The AD8221

is able to reject CMRR over a greater frequency range, reducing

the need for filtering.

A well implemented layout helps to maintain the AD8221’s high

CMRR over frequency. Input source impedance and capacitance

should be closely matched. In addition, source resistance and

capacitance should be placed as close to the inputs as

permissible.

Grounding

The AD8221’s output voltage is developed with respect to the

potential on the reference terminal. Care should be taken to tie

REF to the appropriate “local ground.”

In mixed-signal environments, low level analog signals need to

be isolated from the noisy digital environment. Many ADCs

have separate analog and digital ground pins. Although it is

convenient to tie both grounds to a single ground plane, the

current traveling through the ground wires and PC board may

cause hundreds of millivolts of error. Therefore, separate analog

and digital ground returns should be used to minimize the

current flow from sensitive points to the system ground. An

example layout is shown in Figure 44 and Figure 45.

Figure 44.Top Layer of the AD8221-EVAL

Figure 45.Bottom Layer of the AD8221-EVAL

AD8221ARM Datasheet(PDF) 14 Page - Analog Devices

AD8221ARM Datasheet(HTML) 14 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20

Datasheet Download

Link URL