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ATmega644RFR2 Datasheet(PDF) 7 Page - ATMEL Corporation

Part # ATmega644RFR2
Description  Network support by hardware assisted Multiple PAN Address Filtering
PDF  13 Pages
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Manufacturer  ATMEL [ATMEL Corporation]
Direct Link  http://www.atmel.com
Logo ATMEL - ATMEL Corporation

ATmega644RFR2 Datasheet(HTML) 7 Page - ATMEL Corporation

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42073BS-MCU Wireless-09/14
ATmega2564/1284/644RFR2
3.2.19 TST
Programming and test mode enable pin. If pin TST is not used pull it to low.
3.2.20 CLKI
Input to the clock system. If selected, it provides the operating clock of the
microcontroller.
3.3 Unused Pins
Floating pins can cause power dissipation in the digital input stage. They should be
connected to an appropriate source. In normal operation modes the internal pull-up
resistors can be enabled (in Reset all GPIO are configured as input and the pull-up
resistors are still not enabled).
Bi-directional I/O pins shall not be connected to ground or power supply directly.
The digital input pins TST and CLKI must be connected. If unused pin TST can be
connected to AVSS while CLKI should be connected to DVSS.
Output pins are driven by the device and do not float. Power supply pins respective
ground supply pins are connected together internally.
XTAL1 and XTAL2 shall never be forced to supply voltage at the same time.
3.4 Compatibility and Feature Limitations of QFN-48 Package
3.4.1 AREF
The reference voltage output of the A/D converter is not connected to a pin in the
ATmega2564/1284/644RFR2.
3.4.2 Port E6
The port E6 is not connected to a pin in the ATmega2564/1284/644RFR2. The alternate
pin functions as clock input to timer 3 and external interrupt 6 are not available.
3.4.3 Port F3 and F4
The port F3 and F4 are connected to the same pin in the ATmega2564/1284/644RFR2.
The output configuration should be done carefully in order to avoid excessive current
consumption.
The alternate pin function of port F4 is used by the JTAG interface. If the JTAG
interface is used the port F3 must be configured as input and the alternate pin function
output DIG4 (RX/TX indicator) must be disabled. Otherwise the JTAG interface will not
work. The SPIEN Fuse should be programmed in order to be able to erase a program
that accidentally drive port F3.
There are just 7 single-ended input channel to the ADC available.
3.4.4 Port G0
The port G0 is not connected to a pin in the ATmega2564/1284/644RFR2. The
alternate pin function DIG3 (inverted RX/TX indicator) is not available. If the JTAG
interface is not used the DIG4 alternate pin function output of port F3 can still be used
as RX/TX indicator.



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