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CY3672 Datasheet(PDF) 2 Page - Cypress Semiconductor

Part # CY3672
Description  200-MHz Field Programmable Zero Delay Buffer
PDF  10 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CY3672 Datasheet(HTML) 2 Page - Cypress Semiconductor

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CY23FP12
Document #: 38-07246 Rev. *E
Page 2 of 10
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Pin Description
Pin
Name
I/O
Type
Description
1
REF2
I
LVTTL/LVCMOS
Input reference frequency, 5V-tolerant input.
2
REF1
I
LVTTL/LVCMOS
Input reference frequency, 5V-tolerant input.
3
CLKB0
O
LVTTL
Clock output, Bank B.
4
CLKB1
O
LVTTL
Clock output, Bank B.
5VSSB
PWR
POWER
Ground for Bank B.
6
CLKB2
O
LVTTL
Clock output, Bank B.
7
CLKB3
O
LVTTL
Clock output, Bank B.
8VDDB
PWR
POWER
2.5V or 3.3V supply, Bank B.
9VSSB
PWR
POWER
Ground for Bank B.
10
CLKB4
O
LVTTL
Clock output, Bank B.
11
CLKB5
O
LVTTL
Clock output, Bank B.
12
VDDB
PWR
POWER
2.5V or 3.3V supply, Bank B.
13
VDDC
PWR
POWER
3.3V core supply.
14
S2
I
LVTTL
Select input.
15
S1
I
LVTTL
Select input.
16
VSSC
PWR
POWER
Ground for core.
17
VDDA
PWR
POWER
2.5V or 3.3V supply, Bank A.
18
CLKA5
O
LVTTL
Clock output, Bank A.
19
CLKA4
O
LVTTL
Clock output, Bank A.
20
VSSA
PWR
POWER
Ground for Bank A.
21
VDDA
PWR
POWER
2.5V or 3.3V supply Bank A.
22
CLKA3
O
LVTTL
Clock output, Bank A.
23
CLKA2
O
LVTTL
Clock output, Bank A.
24
VSSA
PWR
POWER
Ground for Bank A.
25
CLKA1
O
LVTTL
Clock output, Bank A.
26
CLKA0
O
LVTTL
CLock output, Bank A.
27
FBK
I
LVTTL
PLL feedback input.
28
REFSEL
I
LVTTL
Reference select input. REFSEL = 0, REF1 is
selected. REFSEL = 1, REF2 is selected.



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