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ICS93V855 Datasheet(PDF) 4 Page - Integrated Circuit Systems

Part # ICS93V855
Description  DDR Phase Lock Loop Clock Driver
PDF  9 Pages
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Manufacturer  ICST [Integrated Circuit Systems]
Direct Link  http://www.icst.com
Logo ICST - Integrated Circuit Systems

ICS93V855 Datasheet(HTML) 4 Page - Integrated Circuit Systems

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ICS93V855
0497B—06/01/04
DC Electrical Characteristics
TA = 0°C to +85°C; Supply Voltage AVDD, VDD = 2.5 V +/- 0.2V (unless otherwise stated)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Voltage
VDDQ, AVDD
2.3
2.5
2.7
V
Low level input voltage
VIL
CLK_INT, CLK_INC, FB_INC,
FB_INT
0.4
VDD/2 - 0.18
V
High level input voltage
VIH
CLK_INT, CLK_INC, FB_INC,
FB_INT
VDD/2 + 0.18
2.1
V
DC input signal voltage (note
1,2)
VIN
-0.3
VDD + 0.3
V
Differential input signal
voltage (note 3)
VID
CLK_INT, CLK_INC, FB_INC,
FB_INT
0.36
VDD + 0.6
V
Differential output voltage
(note 3)
VOD
CLK_INT, CLK_INC, FB_INC,
FB_INT
0.7
VDD + 0.6
V
Output differential cross-
voltage (note 4)
VOX
VDD/2 - 0.15
VDD/2 + 0.15
V
Input differential cross-
voltage (note 4)
VIX
VDD/2 - 0.2
VDD/2
VDD/2 + 0.2
V
Operating free-air
temperature
TA
085
°C
Notes:
1
2
3
4
Differential input signal voltage specifies the differential voltage [VTR-VCP] required for switching,
where VTR is the true input level and VCP is the complementary input level.
Differential cross-point voltage is expected to track variations of VDD and is the voltage at which the
differential signal must be crossing.
Unused inputs must be held high or low to prevent them from floating.
DC input signal voltage specifies the allowable DC excursion of differential input.



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