XR68C92IP datasheet(5/32 Pages) EXAR

5 / 32 page

XR68C92/192

Rev. P1.10

SYMBOL DESCRIPTION (* 44 TQFP Package)

Symbol

Signal

Pin Description

44*

type

OP5

Multi-purpose output. General purpose output or one of the

following functions can be selected for this output pin by

programming the Output Port Configuration Register bit 5:

-RxBRDY - Receive ready signal (Open drain output)

-RxBFULL - Receive FIFO full signal (Open drain output)

OP6

Multi-purpose output. General purpose output or Transmit

A holding register empty interrupt (-TxARDY Open drain

output).

OP7

Multi-purpose output. General purpose output or Transmit

B holding register empty interrupt (-TxBRDY Open drain

output).

A1-A4

2,4,

1,3,

40,42,

6,7

5,6

44,1

Address select lines. To select internal registers.

XTAL1

Crystal input 1 or external clock input. A crystal can be

connected to this pin and XTAL2 pin to utilize the internal

oscillator circuit. An external clock can be used to clock

internal circuit and baud rate generator for custom transmis-

sion rates.

XTAL2

Crystal input 2 or buffered clock output. See XTAL1.

-RESET

Master reset. (active low) A low on this pin will reset all the

outputs and internal registers. The transmitter output and

the receiver input will be disabled during reset time.

GND

16,17

Pwr

Signal and power ground.

-INT

Interrupt output (open drain active low) This pin goes low upon

occurrence of one or more of eight maskable interrupt condi-

tions (when enabled by the interrupt mask register) . CPU can

read the interrupt status register to determine the interrupting

condition(s). This output requires a pull-up resistor.

IP0

Multi-purpose input or Channel A Clear-To-Send (-CTSA

active low).

IP1

Multi-purpose input or Channel B Clear-To-Send (-CTSB

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