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ACE5018T Datasheet(PDF) 7 Page - ACE Technology Co., LTD. |
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ACE5018T Datasheet(HTML) 7 Page - ACE Technology Co., LTD. |
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7 / 12 page ![]() ACE5018T Ultra Low Current Consumption 300mA CMOS Voltage Regulator VER 1.1 7 Application Information Selection of Input/ Output Capacitors In general, all the capacitors need to be low leakage. Any leakage the capacitors have will reduce efficiency, increase the quiescent current. A recent trend in the design of portable devices has been to use ceramic capacitors to filter DC-DC converter inputs. Ceramic capacitors are often chosen because of their small size, low equivalent series resistance (ESR) and high RMS current capability. Also, recently, designers have been looking to ceramic capacitors due to shortages of tantalum capacitors. Unfortunately, using ceramic capacitors for input filtering can cause problems. Applying a voltage step to a ceramic capacitor causes a large current surge that stores energy in the inductances of the power leads. A large voltage spike is created when the stored energy is transferred from these inductances into the ceramic capacitor. These voltage spikes can easily be twice the amplitude of the input voltage step. Many types of capacitors can be used for input bypassing, however, caution must be exercised when using multilayer ceramic capacitors (MLCC). Because of the self-resonant and high Q characteristics of some types of ceramic capacitors, high voltage transients can be generated under some start-up conditions, such as connecting the LDO input to a live power source. Adding a 3Ω resistor in series with an X5R ceramic capacitor will minimize start-up voltage transients. The LDO also requires an output capacitor for loop stability. Connect a 1μF tantalum capacitor from OUT to GND close to the pins. For improved transient response, this output capacitor may be ceramic. C OUT Auto-Discharge Function ACE5018TB series can discharge the electric charge in the output capacitor (C OUT), when a low signal to the CE pin, which enables a whole IC circuit turn off, is inputted via the N-channel transistor located between the V OUT pin and the VSS pin (cf. BLOCK DIAGRAM). The COUT auto-discharge resistance value is set at 200Ω (V OUT=3.0V @ VIN=5.0V at typical). The discharge time of the output capacitor (C OUT) is set by the COUT auto-discharge resistance (R) and the output capacitor (C OUT). By setting time constant of a COUT auto-discharge resistance value [RDISCHRG] and an output capacitor value (COUT ) as τ (τ=C x R DISCHRG), the output voltage after discharge via the N-channel transistor is calculated by the following formulas. ( V : Output voltage after discharge, V OUT(E) : Output voltage, t: Discharge time, τ: C OUT auto-discharge resistance RDISCHRG×Output capacitor (COUT) value C) |
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