HT85F2250 datasheet(64/187 Pages) HOLTEK

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Rev. 1.10

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A/D Flash 8051 Core Low Pin Count MCU

HT85F2250/HT85F2262

Standby Current Considerations

As the main reason to stop the oscillators is to keep the current consumption of the MCU to as low a

value as possible, perhaps only in the order of several micro-amps, there are other considerations which

must also be taken into account by the circuit designer if the power consumption is to be minimised.

Special attention must be made to the I/O pins on the device. All high-impedance input pins must

be connected to either a fixed high or low level as any floating input pins could create internal

oscillations and result in increased current consumption. Care must also be taken with the loads,

which are connected to I/O pins, which are setup as outputs. These should be placed in a condition

in which minimum current is drawn or connected only to external circuits that do not draw current,

such as other CMOS inputs. And for power saving purpose, all the analog modules have to be

disabled using the application program before MCU enters the IDLE or Power-Down mode.

The high speed and low speed oscillators will continue to run when in the IDLE Mode and will

thus consume some power.

Wake-up

After the system enters the IDLE or Power-Down Mode, it can be woken up from one of various

sources listed as follows:

■

In Idle mode:

● An external reset

● An external low level on any P0 I/O pin

● An external low level on INT0 and INT1 pins

● A system interrupt

● A WDT overflow

A system interrupt wake up can be generated by various peripheral interrupts, such as Timer

0~2 interrupt, I2C interrupt, UART interrupt, ADC interrupt, Comparaotr interrupt, Time base

interrupt and LVD interrupt.

■

In Power down mode:

● An external reset

● An external low level on any P0 I/O pin

● An external low level on INT0 and INT1 pins

If the system is woken up by an external reset, the device will experience a full system reset,

however, if the device is woken up by a WDT overflow, a Watchdog Timer reset will be initiated.

Pins P0 [0:7] can be setup via the P0WAKE register to permit a low level on the pin to wake-up

the system. When an I/O pin wake-up occurs, the program will resume execution at the instruction

following the point where the PD or IDL control bit is set high.

If the system is woken up by an interrupt, then two possible situations may occur. The first is

where the related interrupt is disabled or the interrupt is enabled but the stack is full, in which case

the program will resume execution at the instruction following the control bits settings. In this

situation, the interrupt which woke-up the device will not be immediately serviced, but will rather

be serviced later when the related interrupt is finally enabled or when a stack level becomes free.

The other situation is where the related interrupt is enabled and the stack is not full, in which case

the regular interrupt response takes place. If an interrupt request flag is set high before entering

the IDLE or Power-Down mode, then any interrupt requests will not generate a wake-up function

and the related interrupt will be ignored. No matter what the source of the wake-up event is, once

a wake-up event occurs, the program can check if the system clock is stable or not by examining

the oscillator status bits. It is recommended that these bits are examined before proceeding with

instruction execution after a wake up.

HT85F2250 Datasheet(PDF) 64 Page - Holtek Semiconductor Inc

HT85F2250 Datasheet(HTML) 64 Page - Holtek Semiconductor Inc

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