PIC12CE518 datasheet(72/113 Pages) MICROCHIP

72 / 113 page

PIC12C5XX

DS40139E-page 72

TABLE 11-4:

TIMING REQUIREMENTS - PIC12C508/C509

FIGURE 11-4: RESET, WATCHDOG TIMER, AND DEVICE RESET TIMER TIMING - PIC12C508/C509

AC Characteristics

Standard Operating Conditions (unless otherwise specified)

Operating Temperature

°C ≤ TA ≤ +70°C (commercial)

–40

°C ≤ TA ≤ +85°C (industrial)

–40

°C ≤ TA ≤ +125°C (extended)

Operating Voltage VDD range is described in Section 11.1

Parameter

No.

Sym

Characteristic

Min

Typ(1)

Max

Units

TosH2ioV

OSC1

↑ (Q1 cycle) to Port out valid(3)

—

100*

TosH2ioI

OSC1

↑ (Q2 cycle) to Port input invalid

(I/O in hold time)

TBD

—

TioV2osH

Port input valid to OSC1

↑

(I/O in setup time)

TBD

—

TioR

Port output rise time(2, 3)

—10

25**

TioF

Port output fall time(2, 3)

—10

25**

These parameters are characterized but not tested.

** These parameters are design targets and are not tested. No characterization data available at this time.

Note 1: Data in the Typical (“Typ”) column is at 5V, 25°C unless otherwise stated. These parameters are for design

guidance only and are not tested.

2: Measurements are taken in EXTRC mode.

3: See Figure 11-1 for loading conditions.

VDD

MCLR

Internal

POR

DRT

Timeout

Internal

RESET

Watchdog

Timer

RESET

I/O pin

(Note 1)

Note 1: I/O pins must be taken out of hi-impedance mode by enabling the output drivers in software.

(Note 2)

2: Runs in MCLR or WDT reset only in XT and LP modes.

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