MB39C502 datasheet(39/46 Pages) CYPRESS

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Document Number: 002-08449 Rev *A

Page 39 of 46

MB39C502/503/504

11.2.8

Selection of VDD Capacitor

4.7μF is assumed to be a standard, and when QG of switching FET used large, it is necessary to adjust it. To suppress

the ripple voltage by the switching FET gate drive, consider the capacitance calculated by the following formula as the

lowest value for VDD Capacitor and select a thing any more.

Calculate ratings of the VDD terminal capacitor by the following formula.

(MB39C502/C503)

VDD



 50

(MB39C504)

LDO



 50

CVDD

: VDD pin capacitance (F)

CLDO5

: LDO5 pin capacitance (F)

: Total amount of high and low side FETs gate charge (C)

Calculate ratings of the VDD terminal capacitor by the following formula.

(MB39C502/C503)

VDD

CVDD



(MB39C504)

LDO

CLDO



VCVDD

: Withstand voltage of the VDD terminal capacitor (V)

VVDD

: Input voltage of VDD terminal (V)

VCLDO5

: Withstand voltage of the LDO5 terminal capacitor (V)

VLDO5

: Input voltage of LDO5 terminal (V)

11.2.9

Selection of VCC Capacitor and Resistor

(MB39C502/C503)

Connect 1.0μF between VCC to AGND terminal. Connect 10Ω between VCC to VDD terminal.

(MB39C504)

Connect 1.0μF between VCC to AGND terminal. Connect 10Ω between VCC to LDO5 terminal.

MB39C502 Datasheet(PDF) 39 Page - Cypress Semiconductor

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