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LTC4440 Datasheet(PDF) 8 Page - Linear Technology |
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LTC4440 Datasheet(HTML) 8 Page - Linear Technology |
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8 / 12 page ![]() 8 LTC4440 4440i Rise/Fall Time Since the power MOSFET generally accounts for the majority of the power loss in a converter, it is important to quickly turn it on or off, thereby minimizing the transition time in its linear region. The LTC4440 can drive a 1nF load with a 10ns rise time and 7ns fall time. The LTC4440’s rise and fall times are determined by the peak current capabilities of Q1 and N1. The predriver that drives Q1 and N1 uses a nonoverlapping transition scheme to minimize cross-conduction currents. N1 is fully turned off before Q1 is turned on and vice versa. Power Dissipation To ensure proper operation and long-term reliability, the LTC4440 must not operate beyond its maximum tempera- ture rating. Package junction temperature can be calcu- lated by: TJ = TA + PD (θJA) where: TJ = Junction Temperature TA = Ambient Temperature PD = Power Dissipation θJA = Junction-to-Ambient Thermal Resistance Power dissipation consists of standby and switching power losses: PD = PSTDBY + PAC where: PSTDBY = Standby Power Losses PAC = AC Switching Losses The LTC4440 consumes very little current during standby. The DC power loss at VCC = 12V and VBOOST–TS = 12V is only (250 µA + 110µA)(12V) = 4.32mW. AC switching losses are made up of the output capacitive load losses and the transition state losses. The capacitive load losses are primarily due to the large AC currents needed to charge and discharge the load capacitance during switching. Load losses for the output driver driving a pure capacitive load COUT would be: Load Capacitive Power = (COUT)(f)(VBOOST–TS)2 The power MOSFET’s gate capacitance seen by the driver output varies with its VGS voltage level during switching. A power MOSFET’s capacitive load power dissipation can be calculated using its gate charge, QG. The QG value corresponding to the MOSFET’s VGS value (VCC in this case) can be readily obtained from the manufacturer’s QG vs VGS curves: Load Capacitive Power (MOS) = (VBOOST–TS)(QG)(f) Transition state power losses are due to both AC currents required to charge and discharge the driver’s internal nodal capacitances and cross-conduction currents in the internal gates. Undervoltage Lockout (UVLO) The LTC4440 contains both low side and high side under- voltage lockout detectors that monitor VCC and the bootstrapped supply VBOOST–TS. When VCC falls below 6.2V, the internal buffer is disabled and the output pin OUT is pulled down to TS. When VBOOST – TS falls below 6.9V, OUT is pulled down to TS. When both supplies are under- voltage, OUT is pulled low to TS and the chip enters a low current mode, drawing approximately 25 µA from VCC and 86 µA from BOOST. APPLICATIO S I FOR ATIO |
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