ICS84330BVT datasheet(12/19 Pages) ICST

12 / 19 page

84330BV

www.icst.com/products/hiperclocks.html

REV. B JULY 26, 2004

Integrated

Circuit

Systems, Inc.

ICS84330

700MHZ, LOW JITTER, CRYSTAL-TO-3.3V

DIFFERENTIAL LVPECL FREQUENCY SYNTHESIZER

If the FREF_EXT input is driven by a 3.3V LVCMOS driver, the

jitter performance can be improved by reducing the amplitude

swing and slowing down the edge rate.

Figure 7A shows an

amplitude reduction approach for a long trace. The swing will

be approximately 0.85V for logic low and 2.5V for logic high

100

VDD

100

Ro ~ 7 Ohm

Driver_LVCMOS

Zo = 50 Ohm

VDD

GND

TEST_CLK

VDD

GND

TEST_CLK

200

100

Ro ~ 7 Ohm

Driver_LVCMOS

200

VDD

400

Ro ~ 7 Ohm

Driver_LVCMOS

200

VDD

GND

TEST_CLK

JITTER REDUCTION FOR FREF_EXT SINGLE END INPUT

(instead of 0V to 3.3V).

Figure 7B shows amplitude reduction

approach for a short trace. The circuit shown in

Figure 7C

reduces amplitude swing and also slows down the edge rate

by increasing the resistor value.

FIGURE 7C. EDGE RATE REDUCTION BY INCREASING THE RESISTOR VALUE

FIGURE 7A. AMPLITUDE REDUCTION FOR A LONG TRACE

FIGURE 7B. AMPLITUDE REDUCTION FOR A SHORT TRACE

FREF_EXT

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