4

TMP112

SBOS473F – MARCH 2009 – REVISED FEBRUARY 2018

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Copyright © 2009–2018, Texas Instruments Incorporated

(1)

Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings

only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended

Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

(1)

MIN

MAX

UNIT

Supply voltage

V+

5

V

Input voltage

SCL, ADD0, and SDA

–0.5

5

V

Input voltage

ALERT

–0.5

(V+) + 0.5

V

Output voltage

–0.5

5

V

Operating temperature

–55

150

°C

150

°C

–60

150

°C

(1)

JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2)

JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.2 ESD Ratings

VALUE

UNIT

Electrostatic discharge

±2000

V

±1000

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

MIN

NOM

MAX

UNIT

V+

Supply voltage

1.4

3.3

3.6

V

Operating free-air temperature

–40

125

°C

(1)

For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report.

6.4 Thermal Information

TMP112

UNIT

DRL (SOT563)

6 PINS

Junction-to-ambient thermal resistance

200

°C/W

Junction-to-case (top) thermal resistance

73.7

°C/W

Junction-to-board thermal resistance

34.4

°C/W

Junction-to-top characterization parameter

3.1

°C/W

Junction-to-board characterization parameter

34.2

°C/W

Junction-to-case (bottom) thermal resistance

N/A

°C/W