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MM74HC648 Datasheet(PDF) 4 Page - National Semiconductor (TI) |
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MM74HC648 Datasheet(HTML) 4 Page - National Semiconductor (TI) |
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4 / 6 page  AC Electrical Characteristics MM54HC646MM74HC646 MM54HC648MM74HC648 (Continued) VCCe20b60V CLe50 pF tretfe6 ns (unless otherwise specified) TAe25 C 74HC 54HC Symbol Parameter Conditions VCC TAeb40 to 85 CTAeb55 to 125 C Units Typ Guaranteed Limits tPHL tPLH Maximum Propagation CLe50 pF 20V 85 170 214 253 ns Delay SBA or SAB CLe150 pF 20V 110 220 277 328 ns Input to A or B Output CLe50 pF 45V 17 34 43 51 ns CLe150 pF 45V 22 44 55 66 ns CLe50 pF 60V 14 29 36 43 ns CLe150 pF 60V 19 37 47 56 ns tPZL tPZL Maximum Output Enable RLe1kX Time G Input or DIR to A or B CLe50 pF 20V 80 175 219 263 ns Output CLe150 pF 20V 120 225 281 338 ns CLe50 pF 45V 23 35 44 53 ns CLe150 pF 45V 31 45 56 68 ns CLe50 pF 60V 21 30 37 45 ns CLe150 pF 60V 27 38 48 57 ns tPHZ tPLZ Maximum Output Disable RLe1kX 20V 85 175 219 263 ns Time G Input to A or B CLe50 pF 45V 23 35 44 53 ns Output 60V 21 30 37 45 ns tTHL tTLH Maximum Output Rise 20V 60 75 90 ns and Fall Time CLe50 pF 45V 12 15 18 ns 60V 10 13 15 ns tS Minimum Set Up Time 20V 100 125 150 ns 45V 20 25 30 ns 60V 17 21 25 ns tH Minimum Hold Time 20V 0 0 0 ns 45V 0 0 0 ns 60V 0 0 0 ns tW Minimum Pulse Width 20V 80 100 120 ns of Clock 45V 16 20 24 ns 60V 14 18 21 ns tr tf Maximum Input Rise and 20V 1000 1000 1000 ns Fall Time 45V 500 500 500 ns 60V 400 400 400 ns CPD Power Dissipation 90 pF Capacitance (Note 5) CIN Maximum Input Capacitance 5 10 10 10 pF COUT Maximum Output 15 20 20 20 pF Capacitance Note 5 CPD determines the no load dynamic power consumption PDeCPD VCC2 faICC and the no load dynamic current consumption ISeCPD VCC faICC Note 6 Refer to back of this section for Typical MM5474HC AC Switching Waveforms and Test Circuits 4 |
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