CPC5620/CPC5621

4

www.clare.com

Rev. 0.E

Transmit and Receive Insertion Loss

-0.4

0

0.4

dB

30 Hz to 4 kHz, for resistive termination application

circuit with MODE de-asserted and for reactive ter-

mination application circuit with MODE asserted.

Average In-band Noise

-

-126

-

dBm/Hz

4 kHz flat bandwidth

Harmonic Distortion

-

-80

-

dB

Transmit Level

-

0

2.2

Single-tone sine wave. Or 0 dBm into 600

Ω.

Receive Level

-

-

2.2

Single-tone sine wave. Or 0 dBm into 600

Ω.

RX+/RX- Output Drive Current

-

-

0.5

mA

Sink and source

TX+/TX- Input Impedance

60

90

120

k

Ω

Isolation Characteristics

Isolation Voltage

1500

-

-

Line side to host side

Surge Rise Time

2000

-

-

V/

µS

No damage via tip and ring

MODE, OH, and CID Control Logic Inputs

Input Threshold Voltage

0.8

-

2.0

V

High Level Input Current

-120

-

0

µA

Low Level Input Current

-

-

-120

µA

RING Output Logic Levels

Output High Voltage

--

V

Output Low Voltage

-

-

0.4

V

Specifications subject to change without notice. All performance characteristics based on the use of Clare application circuits. Functional operation of the device at

conditions beyond those specified here is not implied. All specifications at 25 °C

Parameter

Minimum

Typical

Maximum

Unit

Conditions