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IRLSG5653 Datasheet(PDF) 3 Page - International Rectifier

Part # IRLSG5653
Description  INTEGRATED SWITCHER
PDF  7 Pages
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Manufacturer  IRF [International Rectifier]
Direct Link  http://www.irf.com
Logo IRF - International Rectifier

IRLSG5653 Datasheet(HTML) 3 Page - International Rectifier

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Electrical Characteristics (for Control IC)
Electrical characteristics for control part (Ta=25℃, Vin=18V,unless otherwise specified)
MIN
TYP
MAX
Vin(ON)
Operation start voltage
14.4
16
17.6
V
Vin=0→17.6V
Vin(OFF) Operation stop voltage
9
10
11
V
Vin=17.6→9V
Iin(ON)
Circuit current in operation
-
-
20
mA
-
Iin(OFF)
Circuit current in non-operation
-
-
100
µA
Vin=14V
TOFF(MAX) Maximum OFF time
45
-
55
µsec
-
Tth(2)
Minimum time for input of quasi
resonant signals
*6
-
-
1
µsec
-
TOFF(MIN) Minimum OFF time
*7
-
-
2
µsec
-
Vth(1)
O.C.P/F.B Pin threshold voltage 1
0.68
0.73
0.78
V
-
Vth(2)
O.C.P/F.B Pin threshold voltage 2
1.3
1.45
1.6
V
IOCP/FB
O.C.P/F.B Pin extraction current
1.2
1.35
1.5
mA
-
Vin(OVP) O.V.P operation voltage
34
36.5
39
V
Vin=0→39.0V
Iin(H)
Vin(La.OFF) Latch circuit release voltage
*8
6.6
-
8.4
V
Vin=39.0→6.6V
Tj(TSD)
Thermal shutdown operating temperature
140
-
-
℃
-
Vin(SENSE) Detected Voltage
31.7
32
32.3
V
Vin=31.7→32.3V
-
Temperature coefficient of detected voltage
-
2.5
-
mV/℃
Vin=31.7→32.3V
µA
Latch circuit sustaining current *8
Definition
Symbol
Vin=39.0→8.5V
Ratings
Units
Test
Conditions
-
-
400
Electrical Characteristics (for MOSFET)
(Ta=25℃) unless otherwise specified
MIN
TYP
MAX
ID=300µA
V3-2=0V(short)
VDS =650V
V3-2=0V(short)
V3-2=10V
ID=1.2A
tf
Switching time
-
-
250
nsec
-
Between channel and
internal frame
300
-2
℃/W
-
θch-F
-
-
Thermal resistance
Symbol
µA
On-resistance
RDS(ON)
--
1.9
Ω
Drain leakage current
IDSS
VDSS
650
-
-
Ratings
Units
Test Conditions
Drain-to-Source breakdown voltage
V
Definition
IRIS-G5653A
*6 Recommended operating conditions
Time for iunput of quasi resonant signals
For the quasi resonant signal inputted to OCP/FB Pin
at the time of quasi resonant operation, the signal shall
be wider thant Tth(2).
*7 The minimum OFF time means TOFF width at the time when the minimum quasi resonant signal is inputted.
*8 The latch circuit means a circuit operated O.V.P and T.S.D.
Vth(2)
VO.C.P/F.B
Tth(2)≧1.0μsec
0V



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