L5953

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1) WREN instruction (Fig.11)

2) WSTA instruction (Fig.16)

Operation D

s

Read the Status Register

1) RSTA instruction (Fig.17)

2) Status Register output (Fig.17)

Operation E

s

Diagnostic Procedure Start

1) WREN instruction (Fig.11)

2) WSTA instruction (Fig.14)

Operation F

s

Read the Diagnostic Register

Case 2: after a Diagnostic Procedure Start

1) RDIA instruction (Fig.15)

2) Diagnostic Register output (Fig.15)

An operation F must follow an operation E if the pin IRQ is not activated.

The delay between the Operation E and an Operation F must be longer than 100

µs.

To be recognized, the fault must be present without interruptions during all the delay above mentionned .

After an Operation F, the bit s0 of the Status Register is resettled (0)

Operation G

s

Write operation disabled

1) WRDI instruction (Table 1)

Operation H

s

Read the Diagnostic Register case 3: after an IRQ pin activation

1) RDIA instruction (Fig. 15)

2) Diagnostic Register Output (Fig. 15)

The delay between the IRQ activation and an Operation F must be longer than 100

µs

Figure 11. Write Enable Latch Sequence

00

01

02

03

04

HIGH IMPEDANCE

05

06

07

S

C

CPOL=0

CPHA=0

D

Q

D03AU1483