VITESSE

SEMICONDUCTOR CORPORATION

Preliminary Data Sheet

VSC837

3.2Gb/s

68x68 Crosspoint Switch

Page 2

G52309-0, Rev 3.0

02/16/01

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Tel: (800) VITESSE • FAX: (805) 987-5896 • Email: prodinfo@vitesse.com

Internet: www.vitesse.com

Functional Block Diagram

Functional Description

Input / Output Characteristics

All input data must be differential and should be nominally biased to +2.0V or AC-coupled. Other levels

are allowed as described under the Input Termination section. On-chip terminations are provided, with a nomi-

nal impedance of 100

Ω differential. All input termination resistors float with an internal bias provided for AC-

coupling.

For direct interconnection of multiple VSC837 devices, a CML termination mode is provided by tying the

loads for an open-drain or open-collector differential output.

Data outputs are provided through differential current switches with on-chip back-termination. The output

circuit is capable of driving external 50

Ω far-end termination (recommended). The output back-terminations are

electronically switchable to enable a power savings of 2W (max) by reducing the output driver current.

68x69 Switch Core

Core Program Registers

CONFIG

INITB

A, AN[0:67]

Y, YN[0:67]

Program Memory

Program Interface

Activity

Monitor