MP2326 Rev. 1.1

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19

1/28/2016

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OUT

OUT

OUT

ESR

SW

IN

VV

V(1

) R

FL

V



 





(22)

In addition to considering the output ripple,

choosing a larger output capacitor can achieve

improved load transient response. However, the

maximum output capacitor limitation should be

considered in design application. If the output

capacitor value is too high, the output voltage

cannot reach the design value during the soft-

start time, causing it to fail to regulate. The

limited approximately by:

O_ MAX

LIM _ AVG

OUT

ss

OUT

C(I

I

) T / V





(23)

time.

External Bootstrap Diode

BST voltage may become insufficient during

particular conditions. In these cases, an

external bootstrap diode can enhance the

efficiency of the regulator and help to avoid

insufficient BST voltage during light-load PFM

operation. The insufficient BST voltage is more

likely to happen at either of the following

conditions:





The duty cycle is large: D=

IN

OUT

V

V

>65%

In these cases (if insufficient BST voltage

occurs), the output-ripple voltage may become

extremely large during a light-load condition, or

there may be poor efficiency during a heavy-

load condition. Add an external BST diode from

VCC to BST as shown in Fig. 12.

FIGURE 12. Optional External Bootstrap Diode

The recommended external BST diode is

IN4148.

PCB Layout Guidelines

Efficient PCB layout is critical for efficient

operation. A poor layout design can result in

poor line or load regulation and stability issues.

For best results, please refer to Fig.13 and

follow the guidelines below:

1）Place the high-current paths (GND, IN, and

SW) very close to the device with short,

direct, and wide traces.

2）Place the input capacitor as close as

possible to IN and GND.

3）Place the FREQ/MODE circuit very close to

the part.

4）Place the external feedback resistors next

to FB.

5）Keep the switching node SW short and

away from the feedback network.

For optimum performance, use 4-layer boards.

Fig. 13 shows the top and bottom layers of the

PCB (Inner 1 and Inner 2 are all GND).

sw

VOUT

GND

VIN

R1

R2

GND

C1A

C1B

C2A

C2B

R5

R7

R6

C3

C4

Rb

Cb

R3

L

C1

Top Layer

MP2326