MN5572

21

SDF00008BEM

2. 5. Interrupt signal wait processing

• Interrupt signal wait processing flowchart

• Interrupt signal wait processing flowchart description

The IC internal state changes can be verified from the generated interrupt signal.

• Interrupt signal check

The interrupt signal (IRQ) is monitored until the interrupt generation conditions set in the IC's mask register

are met and the IC asserts (sets to the high level) the interrupt signal.

• Status register check

The status register is read and checked.

After the status register is read, the IC deasserts the interrupt signal (IRQ).

• Interrupt verification

The reason the interrupt was generated is verified from the values of the MIS, PMS, and RMS fields in the

status register.

This determines what processing must be performed next.

Note: Interrupt signal wait processing can not be used in PCI mode.

In that case, the IC internal state changes should be determined by periodically reading the status register.

I Operation

2. Operating Procedures (continued)

2. 4. Gray-scale data readout processing (continued)

• Gray-scale data readout processing flowchart (continued)

• Has 1 frame completed?

Processing terminates if the gray-scale data readout operation has completed the output of the gray-scale data

for a single figure or font character. The IC divides the gray-scale data into units internally, and if there is still

data that must be output (REC

= 0), another read operation must be performed again by checking the status

register.

start

Path data write

Interrupt signal check

Status register check

(status read)

IRQ

= "H"

IRQ

= "H"→"L"

PMS

= 00

RMS

= 11

IRQ

= "L"

MIS

= 1→0

Interrupt verification

Initialization complete

Gray-scale data readout