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MP2269 Datasheet(PDF) 12 Page - Monolithic Power Systems |
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MP2269 Datasheet(HTML) 12 Page - Monolithic Power Systems |
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12 / 19 page ![]() MP2269 - 30V, 1A, LOW IQ, SYNCHRONOUS STEP-DOWN CONVERTER MP2269 Rev. 1.0 www.MonolithicPower.com 12 10/11/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. LDO1 LDO2 VIN BIAS VCC EN1 EN2 D1 Figure 3: VCC Regulator Bootstrap Charging The bootstrap capacitor is charged and regulated to about 5V by the dedicated internal bootstrap regulator. When the voltage between the BST and SW nodes is lower than its regulation, a PMOS connected from VCC to BST is turned on. The charging current path is from VCC to BST to SW. When the HS-FET is on, VIN is about equal to SW, so the bootstrap capacitor cannot be charged. At higher duty cycle operation conditions, the time period available to the bootstrap charging is less, so the bootstrap capacitor may not be charged sufficiently. If the internal circuit does not have sufficient voltage or time to charge the bootstrap capacitor, extra external circuitry can be used to ensure that the bootstrap voltage is in the normal operation region. Low-Dropout Operation To improve dropout, the MP2269 is designed to operate at almost 100% duty cycle as long as the BST to SW voltage is greater than 2.5V. When the voltage from BST to SW drops below 2.5V, the HS-FET is turned off using an under- voltage lockout (UVLO) circuit that allows the LS-FET to conduct and refresh the charge on the BST capacitor. In DCM or PSM, the LS-FET is forced on to refresh the BST voltage. Since the supply current sourced from the BST capacitor is low, the HS-FET can remain on for more switching cycles than are required to refresh the capacitor, making the effective duty cycle of the switching regulator high. The effective duty cycle during the dropout of the regulator is mainly influenced by the voltage drops across the power MOSFET, inductor resistance, low-side diode, and printed circuit board resistance. Enable (EN) Control EN is a digital control pin that turns the regulator on and off. EN can be enabled by an external logic H/L signal. When EN is pulled below the threshold voltage, the chip is put into the lowest shutdown current mode. Forcing EN above the EN threshold voltage turns on the part. For the programmable VIN under-voltage lockout (UVLO), with a high-enough VIN, the chip can be enabled and disabled by EN (see Figure 4). This circuit can generate a programmable VIN UVLO and hysteresis. EN VIN REN1 REN2 Figure 4: Enable Divider Circuit Frequency Programmable The MP2269 oscillating frequency is programmed by an external resistor (Rfreq) from FREQ to ground. The approximate value of Rfreq can be calculated with Equation (1): freq s 86500 R (k ) 6.5 f (kHz) (1) |
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