© 2010 Fairchild Semiconductor Corporation

www.fairchildsemi.com

FL6961 • Rev. 1.0.2

3

Marking Information

Figure 4. Marking Information

Pin Configuration

Figure 5.

Pin Configuration (Top View)

Pin Definitions

Pin #

Name

Description

1

INV

Inverting Input of the Error Amplifier

. INV is connected to the converter output via a resistive

divider. This pin is also used for over-voltage clamping and open-loop feedback protection.

2

COMP

Output of the Error Amplifier

. To create a precise clamping protection, a compensation network

between this pin and GND is suggested.

3

MOT

Maximum On Time

. A resistor from MOT to GND is used to determine the maximum on-time of

the external power MOSFET. The maximum output power of the converter is a function of the

maximum on-time.

4

CS

Current Sense

. Input to the over-current protection comparator. When the sensed voltage across

the sense resistor reaches the internal threshold (0.8V), the switch is turned off to activate cycle-

by-cycle current limiting.

5

ZCD

Zero-Current Detection

. This pin is connected to an auxiliary winding via a resistor to detect the

zero crossing of the switch current. When the zero crossing is detected, a new switching cycle is

started. If it is connected to GND, the device is disabled.

6

GND

Ground

. The power ground and signal ground. Placing a 0.1µF decoupling capacitor between

7

GATE

Driver Output

. Totem-pole driver output to drive the external power MOSFET. The clamped gate

output voltage is 16.5V.

8

Power Supply

. Driver and control circuit supply voltage.

F

- Fairchild Logo

Z- Plant Code

X- Year Code

Y- Week Code

TT: Die Run Code

T: Package Type (M=SOP)

P: Z: Pb Free

Y: Green Compound

M: Manufacture Flow Code

FL6961

TPM