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MP4050AGJ Datasheet(PDF) 4 Page - Monolithic Power Systems |
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MP4050AGJ Datasheet(HTML) 4 Page - Monolithic Power Systems |
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4 / 21 page ![]() MP4050A – NON-ISOLATED, HIGH-BRIGHTNESS LED DRIVER, WITH ENHANCED THERMAL FEATURE MP4050A Rev. 1.01 www.MonolithicPower.com 4 1/14/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. ELECTRICAL CHARACTERISTICS Typical values are VCC =5V, TJ = 25C, unless otherwise noted. Minimum and maximum values are at VCC =5V, TJ = -40C to +125C, unless otherwise noted, guaranteed by characterization. Parameter Symbol Condition Min Typ Max Units Start-Up Current Source (DRAIN) Internal Regulator Supply Current IREGULATOR VCC=0V, VDRAIN=100V 3.8 5 6.1 mA Leakage Current from DRAIN ID_LKG VCC=6V, VDRAIN=500V 14 22 μA Supply Voltage Management (VCC) VCC Increasing Level: Internal Regulator Stops & IC Starts Working VCCOFF VCC Rising Edge 4.00 4.35 4.70 V VCC Normal Level VCCNOR Normal Operation 4.25 V VCC Decreasing Level: Internal Regulator Turn-On VCCON VCC Falling Edge 3.85 4.15 4.50 V VCC Hysteresis: Regulator On/Off VCCOFF-ON 0.11 0.20 0.28 V VCC Decreasing Level: IC Stops VCCSTOP VCC Falling Edge 3 3.4 3.8 V VCC Hysteresis: Regulator Off & IC Stops Working VCCOFF-STOP 0.93 1.25 1.6 V VCC Decreasing Level: Protection Phase Ends VCCPRO VCC Falling Edge 1.9 2.35 2.8 V Internal IC Consumption ICC VCC=4.3V, fSW=33kHz, Duty=84% 350 425 μA Internal IC Consumption at Latch-Off Phase ICC_LATCH 18 32 μA Internal MOSFET (DRAIN to SOURCE) Breakdown Voltage VBRDSS ID=80μA 500 V ID=10mA, TJ=25°C 8 12 Ω DRAIN SOURCE On-State Resistance RDS(ON) VCC=VCCSTOP + 50mV, ID=10mA, TJ=25°C 8 12 Ω Current Sampling Management (SOURCE) Peak Current Limit at Normal Operation VLIMIT 0.4 0.46 0.52 V Leading Edge Blanking tLEB 130 200 310 ns Feedback Threshold: Turn-On High- Side MOSFET VREF Regulate the Average Current 0.187 0.196 0.205 V tOFF_MIN Normal Operation 3.4 4.7 6.2 μs The 1 st 32 Switching Cycles at Start-Up tOFF_MIN ×3.5 μs The 2 nd 32 Switching Cycles at Start-Up tOFF_MIN ×2 μs Minimum Off-Time Limitation tOFF_MIN_ST The 3 rd 32 Switching Cycles at Start-Up tOFF_MIN ×1.2 μs Maximum On-Time Limitation tON_MAX 16 25 37 μs |
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