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MP024-10 Datasheet(PDF) 17 Page - Monolithic Power Systems |
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MP024-10 Datasheet(HTML) 17 Page - Monolithic Power Systems |
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17 / 25 page ![]() MP024-10 – PRIMARY-SIDE CC/CV REGULATOR MP024-10 Rev.1.0 www.MonolithicPower.com 17 4/17/2017 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2017 MPS. All Rights Reserved. If CP is connected with a resistor, then there are several options for the CP and DS-Max combination (see Figure 8). CP RCP Figure 8: External Configuration of CP Table 1 shows all available choices for DS-Max. The entire customization process is completed before start-up and latched in a register, so it does not have any influence on the normal operation. Table 1: DS-Max vs. CP Configuration RCP/CCP DS-Max 0 Ω/NC 0.4 10k Ω/NC 0.3 20k Ω/NC 0.35 40k Ω/NC 0.5 NC/1 μF 0.4 To enable the overload protection (OLP) function in CC mode, the sampling on the FB voltage should be running, and the sampling time should be fixed at tFBS-Max. Leading-Edge Blanking The MP024-10 uses a leading-edge blanking period when the MOSFET turns on. Leading- edge blanking is used to prevent a false termination of the switching pulse caused by the turn-on current spike. During this blanking period, the current sense comparator is disabled, and the MOSFET cannot be turned off. Discontinuous Conduction Mode (DCM) Detection The MP024-10 is designed to operate in discontinuous conduction mode (DCM) in both CV and CC modes. To avoid operating in continuous conduction mode (CCM), the MP024-10 implements a zero-current detection function internally with a threshold of VDCM. The IC does not begin the next cycle until ZCD is detected. During normal operation, the blanking time for ZCD is synchronized with the FB sampling time (i.e.: ZCD always starts after the sampling phase is done). There is also a soft-start (SS) function on the ZCD blanking time that prevents ZCD from being falsely triggered when the output capacitor is not charged up. During the start-up period, the blanking time for ZCD gradually shrinks from tB_STP (10μs) to the FB sampling time in three cycles. Protection Features (OVP, OCkP, SSP, and OLP) The MP024-10 includes over-voltage protection (OVP), open-circuit protection (OCkP), sensing- short protection (SSP), and overload protection (OLP). If the voltage at FB exceeds VFBovp, OVP is triggered. If VFBopen cannot be monitored for each cycle, OCkP is triggered. If the maximum turn on time is reached, SSP is triggered. If the sampled FB voltage is lower than VFBolp for 128 consecutive cycles, OLP is triggered. The MP024-10 immediately shuts down the driving signals and enters hiccup mode when any of these protection features are triggered and resumes normal operation when the fault has been removed. OLP is not enabled until the soft-start period of the ZCD blanking time is finished. Over-Temperature Protection (OTP) When the junction temperature of the IC exceeds the thermal shutdown threshold, over- temperature protection (OTP) is triggered, and the IC stops switching. The MP024-10 resumes normal operation when the junction temperature drop exceeds the thermal shutdown hysteresis. Output Cable Compensation The MP024-10 has an internal output cable compensation circuit (see Figure 9). A switching signal (VLimit*tONS) is generated internally and is synchronized with the switching frequency. The duty on time of this signal is tONS, and the amplitude of this signal is proportional to the current limit threshold. The switching signal is output to CP through a 1M Ω resistor. A low- pass filter can be implemented by placing an external capacitor on CP, and a DC voltage (VCP) that is proportional to the output current can be derived on CP. An internal current sinking into FB is proportional to VCP, so the voltage drop on the upper resistor of the divider implements the output cable compensation function. |
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